Current mirror circuit

Patent metadata

Field	Value
Publication number	US-11068010-B2
Application number	US-201916722011-A
Country	US
Kind code	B2
Filing date	Dec 20, 2019
Priority date	Dec 20, 2019
Publication date	Jul 20, 2021
Grant date	Jul 20, 2021

Abstract

A current mirror circuit includes a current output terminal, a first transistor, a second transistor, and a digital-to-analog converter (DAC). The first transistor includes a first terminal coupled to a power rail, a second terminal coupled to a current source, and a third terminal coupled to the current source. The second transistor includes a first terminal coupled to the power rail, a second terminal coupled to the second terminal of the first transistor, and a third terminal coupled to the current output terminal. The DAC includes an output terminal coupled to the second transistor.

First claim

What is claimed is:

1. A current mirror circuit, comprising:
a current output terminal;
a first transistor comprising:
a source terminal coupled to a power supply;
a gate terminal coupled to a current source; and
a drain terminal coupled to the gate terminal;

a second transistor comprising:
a source terminal coupled to the power supply;
a gate terminal coupled to the gate terminal of the first transistor; and
a drain terminal coupled to the current output terminal;

a digital-to-analog converter (DAC) comprising:
an output terminal coupled to the gate terminal of the second transistor;

wherein:
the DAC is a first DAC;
the current output terminal is a first current output terminal; and
the current mirror circuit further comprises:
a second current output terminal;
a third transistor comprising:
a first terminal coupled to the power supply;
a second terminal coupled to the second terminal of the first transistor; and
a third terminal coupled to the second current output terminal; and

a second DAC comprising:
an output terminal coupled to the gate terminal of the third transistor.

2. The current mirror circuit of claim 1 , further comprising:
a resistor comprising:
a first terminal coupled to the gate terminal of the first transistor; and
a second terminal coupled to the gate terminal of the second transistor.

3. The current mirror circuit of claim 1 , wherein the first DAC is configured to selectably source or sink current.

4. The current mirror circuit of claim 1 , further comprising:
a resistor comprising:
a first terminal coupled to the power supply; and
a second terminal coupled to the source terminal of the second transistor.

5. The current mirror circuit of claim 1 , further comprising:
an amplifier comprising:
a first input terminal coupled to a voltage source;
a second input terminal coupled to the drain terminal of the first transistor; and
an output terminal coupled to the gate terminal of the first transistor.

6. The current mirror circuit of claim 1 , wherein the first DAC is configured to adjust current output of the second transistor.

Assignees

• Texas Instruments Inc

Inventors

• Shill Mark Allan
• Wang Binan

Classifications

• G05F3/265 Primary

  using bipolar transistors only · CPC title

• H03M1/785

  using resistors, i.e. R-2R ladders · CPC title

• G05F3/262 Primary

  using field-effect transistors only · CPC title

• G05F1/561

  Voltage to current converters (amplifiers H03F) · CPC title