Continuous-time sampler circuits

US11063794B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11063794-B2
Application numberUS-202016833177-A
CountryUS
Kind codeB2
Filing dateMar 27, 2020
Priority dateFeb 14, 2018
Publication dateJul 13, 2021
Grant dateJul 13, 2021

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Abstract

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A continuous-time sampler has series-connected delay lines with intermediate output taps between the delay lines. Signal from an output tap can be buffered by an optional voltage buffer for performance. A corresponding controlled switch is provided with each output tap to connect the output tap to an output of the continuous-time sampler. The delay lines store a continuous-time input signal waveform within the propagation delays. Controlling the switches corresponding to the output taps with pulses that match the propagation delays can yield a same input signal value at the output. The continuous-time sampler effectively “holds” or provides the input signal value at the output for further processing without requiring switched-capacitor circuits that sample the input signal value onto some capacitor. In some cases, the continuous-time sampler can be a recursively-connected delay line. The continuous-time sampler can be used as the front end sampler in a variety of analog-to-digital converters.

First claim

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What is claimed is: 1. A method for sampling, comprising: capturing, by one or more recursively-connected delay lines, time-shifted waveforms of a continuous-time input signal received at an input of the one or more recursively-connected delay lines; and evaluating, at a plurality of clock edges, a same signal value from the time-shifted waveforms of the continuous-time input signal, at an output of the one or more recursively-connected delay lines. 2. The method of claim 1 , further comprising: disconnecting a tab of a first recursively-connected delay line from receiving the continuous-time input signal; and connecting the tab of the first recursively-connected delay line to receive a delayed signal generated by the first recursively-connected delay line. 3. A recursive continuous-time sampler, comprising: a recursively-connected delay line having a first terminal and a second terminal; an input tap; a switch controllable to couple the input tap to an input of the recursive continuous-time sampler, or to couple the input tap to the second terminal of the recursively-connected delay line; a buffer to buffer a signal at the input tap; and an output tap at an output of the buffer; wherein the second terminal of the recursively-connected delay line receives a signal from the output tap. 4. The recursive continuous-time sampler of claim 3 , further comprising: a resistor between the output tap and the second terminal of the recursively-connected delay line. 5. The recursive continuous-time sampler of claim 3 , wherein: the output tap is an output of the recursive continuous-time sampler. 6. The recursive continuous-time sampler of claim 3 , further comprising: a grounded resistor at the input tap. 7. The recursive continuous-time sampler of claim 3 , wherein: the buffer is a voltage buffer. 8. The recursive continuous-time sampler of claim 3 , wherein: the buffer has a gain of 2. 9. The recursive continuous-time sampler of claim 3 , wherein: the input tap connects to the input of the recursive continuous-time sampler, using the switch, to receive a continuous-time input signal. 10. The recursive continuous-time sampler of claim 3 , wherein: the input tap connects to the second terminal of the recursively-connected delay line, using the switch, to form a recursive loop. 11. The recursive continuous-time sampler of claim 3 , wherein: the recursively-connected delay line captures time-shifted waveforms of a continuous-time input signal. 12. The recursive continuous-time sampler of claim 3 , wherein: the output tap of the recursive continuous-time sampler makes time-shifted waveforms of a continuous-time input signal received at the input of the recursive continuous-time sampler available for evaluation. 13. The recursive continuous-time sampler of claim 3 , wherein: at a plurality of clock edges, a same signal value of a continuous-time input signal received at the input of the recursive continuous-time sampler, is evaluated from time-shifted waveforms of the continuous-time input signal stored in the recursively-connected delay line. 14. The recursive continuous-time sampler of claim 3 , wherein: the output tap of the recursive continuous-time sampler is coupled to an input of an analog-to-digital converter. 15. The recursive continuous-time sampler of claim 3 , wherein: the output tap of the recursive continuous-time sampler is coupled to an input of a further recursive continuous-time sampler. 16. A method for sampling, comprising: connecting an input tap to an input; propagating a continuous-time signal received at the input through a buffer and to a first terminal of a recursively-connected delay line; disconnecting the input tap from the input; connecting the input tap to a second terminal of the recursively-connected delay line; receiving a delayed version of the continuous-time signal at the input tap; and outputting the delayed version of the continuous-time signal, at an output tap between the buffer and the first terminal of the recursively-connected delay line. 17. The method of claim 16 , further comprising: at a plurality of clock edges, evaluating a same signal value of the continuous-time signal at the output tap. 18. The method of claim 16 , further comprising: at a plurality of clock edges, evaluating a same signal value of the continuous-time signal at the output tap, by an analog-to-digital converter. 19. The method of claim 16 , wherein: propagating the continuous-time signal through a buffer comprises applying a gain of 2 to the continuous-time signal. 20. The method of claim 16 , wherein: the recursively-connected delay line captures time-shifted waveforms of the continuous-time signal.

Assignees

Inventors

Classifications

  • using analogue/digital converters of the type with comparison of different reference values with the value of voltage or current, e.g. using step-by-step method · CPC title

  • Circuits for representing a single waveform by sampling, e.g. for very high frequencies · CPC title

  • Details of sampling arrangements or methods · CPC title

  • Clock generating, synchronizing or distributing circuits within memory device · CPC title

  • using a capacitive memory element (G11C27/04 takes precedence) · CPC title

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What does patent US11063794B2 cover?
A continuous-time sampler has series-connected delay lines with intermediate output taps between the delay lines. Signal from an output tap can be buffered by an optional voltage buffer for performance. A corresponding controlled switch is provided with each output tap to connect the output tap to an output of the continuous-time sampler. The delay lines store a continuous-time input signal wav…
Who is the assignee on this patent?
Analog Devices International Unlimited Co
What technology area does this patent fall under?
Primary CPC classification H04L25/069. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jul 13 2021 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 6 related publications on this page (citations in our corpus or others sharing the same primary CPC).