Optoelectronic semiconductor chip
US-2024204138-A1 · Jun 20, 2024 · US
US11063184B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-11063184-B2 |
| Application number | US-201816137525-A |
| Country | US |
| Kind code | B2 |
| Filing date | Sep 20, 2018 |
| Priority date | Apr 27, 2016 |
| Publication date | Jul 13, 2021 |
| Grant date | Jul 13, 2021 |
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A light-emitting diode includes: a light emitting epitaxial structure including a first-type semiconductor layer, an active layer and a second-type semiconductor layer, and having a first surface as a light emitting surface, and an opposing second surface; a conducting layer formed over the second surface and including a physical plating layer and a chemical plating layer, wherein the physical plating layer is adjacent to the light emitting epitaxial structure and has cracks, and the chemical plating layer fills the cracks in the physical plating layer; and a submount coupled to the light emitting epitaxial laminated layer through the conducting layer.
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The invention claimed is: 1. A light-emitting diode, comprising: a light emitting epitaxial structure including a first-type semiconductor layer, an active layer and a second-type semiconductor layer, and having a first surface as a light emitting surface, and an opposing second surface; a conducting layer formed over the second surface and including a physical plating layer and a chemical plating layer; a transparent insulating layer is arranged between the conducting layer and the light emitting epitaxial laminated structure and has a series of conductive through-holes, wherein the physical plating layer is adjacent to the light emitting epitaxial structure and has cracks formed during a vacuum evaporation process proximal to the conductive through-holes, and the chemical plating layer fills the cracks having structures resulting from the vacuum evaporation process in the physical plating layer; and a submount coupled to the light emitting epitaxial structure through the conducting layer. 2. The light-emitting diode of claim 1 , wherein: the physical plating layer fills the conductive through-holes. 3. The light-emitting diode of claim 2 , wherein: a surface of a side of the physical plating layer distal from the light emitting epitaxial structure has a height difference, thereby after the coupling to the submount, forming a series of holes at positions corresponding to the conductive through-holes, and serving as a current blocking layer. 4. The light-emitting diode of claim 2 , wherein the cracks are formed at an edge position of the physical plating layer. 5. The light-emitting diode of claim 1 , wherein a thickness of the chemical plating layer is 0.3-5 μm. 6. A method of fabricating the light-emitting diode of claim 1 , the method comprising: 1) providing the light emitting epitaxial structure including the first-type semiconductor layer, the active layer and the second-type semiconductor layer, having the first surface as the light emitting surface and the second surface opposing to the first surface; 2) forming the conducting layer at the second surface of the light emitting epitaxial structure; 3) providing the submount and coupling the submount to the light emitting epitaxial structure through the conducting layer; wherein the forming the conducting layer comprises: forming the physical plating layer at the second surface of the light emitting epitaxial structure by metal evaporation, with the cracks therein; depositing a metal material at the physical plating layer by chemical plating to form the chemical plating layer and fill the cracks having structures resulting from the vacuum evaporation process in the physical plating layer. 7. The method of claim 6 , wherein prior to the forming the conducting layer, the transparent insulating layer is first formed at the second surface of the light emitting epitaxial structure and has the series of conductive through-holes filled by the physical plating layer. 8. The method of claim 7 , wherein a surface of a side of the physical plating layer distal from the light emitting epitaxial structure has a height difference, thereby after the connection to the submount, forming a series of holes on the positions corresponding to the conductive through-holes, and serves as a current blocking layer. 9. The method of claim 7 , wherein the cracks are formed on the edge position of the physical plating layer. 10. The method of claim 6 , wherein a thickness of the chemical plating layer is 0.3-5 μm. 11. A light-emitting system for display, signage, or lighting comprising a plurality of light-emitting diodes (LEDs), each LED comprising: a light emitting epitaxial structure including a first-type semiconductor layer, an active layer and a second-type semiconductor layer, and having a first surface as a light emitting surface, and an opposing second surface; a conducting layer formed over the second surface and including a physical plating layer and a chemical plating layer; a transparent insulating layer is arranged between the conducting layer and the light emitting epitaxial laminated structure and has a series of conductive through-holes, wherein the physical plating layer is adjacent to the light emitting epitaxial structure and has cracks formed during a vacuum evaporation process proximal to the conductive through-holes, and the chemical plating layer fills the cracks having structures resulting from the vacuum evaporation process in the physical plating layer; and a submount coupled to the light emitting epitaxial laminated layer through the conducting layer. 12. The light-emitting system of claim 11 , wherein: the physical plating layer fills the conductive through-holes. 13. The light-emitting system of claim 12 , wherein: a surface of a side of the physical plating layer distal from the light emitting epitaxial structure has a height difference, thereby after the coupling to the submount, forming the series of holes at positions corresponding to the conductive through-holes, and serving as a current blocking layer. 14. The light-emitting system of claim 12 , wherein the cracks are formed at an edge position of the physical plating layer. 15. The light-emitting system of claim 11 , wherein a thickness of the chemical plating layer is 0.3-5 μm. 16. The light-emitting system of claim 11 , wherein each LED is fabricated with a method comprising: 1) providing the light emitting epitaxial structure including the first-type semiconductor layer, the active layer and the second-type semiconductor layer, having the first surface as the light emitting surface and the second surface opposing to the first surface; 2) forming the conducting layer at the second surface of the light emitting epitaxial structure; 3) providing the submount and coupling the submount to the light emitting epitaxial structure through the conducting layer; wherein the forming the conducting layer comprises: the physical plating layer is formed at the second surface of the light emitting epitaxial structure by metal evaporation, with the cracks therein; by chemical plating, the metal material is deposited at the physical plating layer and forms a chemical plating layer and fills the cracks having structures resulting from the vacuum evaporation process in the physical plating layer. 17. The light-emitting system of claim 16 , wherein prior to the forming the conducting layer, a transparent insulating layer is first formed at the second surface of the light emitting epitaxial structure and has the series of conductive through-holes filled by the physical plating layer. 18. The light-emitting system of claim 7 , wherein a surface of a side of the physical plating layer distal from the light emitting epitaxial structure has a height difference, thereby after the connection to the submount, forming a series of holes on the positions corresponding to the conductive through-holes, and serves as a current blocking layer. 19. The light-emitting system of claim 17 , wherein the cracks are formed on the edge position of the physical plating layer. 20. The light-emitting system of claim 16 , wherein a thickness of the chemical plating layer is 0.3-5 μm.
Package configurations · CPC title
of interconnections · CPC title
of coatings · CPC title
of electrodes · CPC title
Current-blocking structures · CPC title
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