Display device including thin film transistor with active layer portions having different thicknesses

Patent metadata

Field	Value
Publication number	US-11063155-B2
Application number	US-201916414266-A
Country	US
Kind code	B2
Filing date	May 16, 2019
Priority date	Dec 6, 2018
Publication date	Jul 13, 2021
Grant date	Jul 13, 2021

Abstract

A thin film transistor includes an active layer including a first portion having a first thickness and a second portion having a second thickness greater than the first thickness, a capping layer filling a thickness difference between the first portion and the second portion and arranged on the first portion, a gate insulating layer arranged on the capping layer, a gate electrode on the active layer, wherein the gate insulating layer and the capping layer are disposed between the gate electrode and the active layer, and a source electrode and a drain electrode connected to the active layer.

First claim

What is claimed is:

1. A thin film transistor comprising:
an active layer including a first portion having a first thickness, a second portion having a second thickness greater than the first thickness, and a third portion disposed therebetween,
wherein the third portion of the active layer has a sloped upper surface which connects an upper surface of the first portion and an upper surface of the second portion to each other;
a capping layer filling a thickness difference between the first portion and the second portion and arranged on the first portion;
a gate insulating layer arranged on the capping layer;
a gate electrode on the active layer,
wherein the gate insulating layer and a portion of the capping layer are vertically interposed between the gate electrode and the active layer, and
wherein the portion of the capping layer is in contact with the sloped upper surface of the third portion; and
a source electrode and a drain electrode connected to the active layer,
wherein the portion of the capping layer is horizontally interposed between the source electrode and the drain electrode, and the sloped upper surface of the third portion, and
wherein the first portion is integral with the second portion.

2. The thin film transistor of claim 1 ,
wherein the active layer has an entire flat bottom surface,
wherein the capping layer covers a top surface of the first portion, and
wherein the capping layer is disposed between the top surface of the first portion and a bottom surface of the gate insulating layer.

3. The thin film transistor of claim 2 ,
wherein the capping layer further covers a lateral surface of an end portion of the first portion.

4. The thin film transistor of claim 1 ,
wherein the gate insulating layer directly contacts the second portion.

5. The thin film transistor of claim 1 ,
wherein the capping layer includes silicon oxide.

6. A display device comprising:
a substrate;
a thin film transistor on the substrate; and
a light-emitting element connected to the thin film transistor,
wherein the thin film transistor comprises:
an active layer including a first portion having a first thickness, a second portion having a second thickness greater than the first thickness, and a third portion disposed therebetween,
wherein the third portion of the active layer has a sloped upper surface which connects an upper surface of the first portion and an upper surface of the second portion to each other;
a capping layer filling a thickness difference between the first portion and the second portion and arranged on the first portion;
a gate insulating layer arranged on the capping layer;
a gate electrode on the active layer,
wherein the gate insulating layer and the capping layer are disposed between the gate electrode and the active layer; and
a source electrode and a drain electrode connected to the active layer,
wherein the portion of the capping layer is horizontally interposed between the source electrode and the drain electrode, and the sloped upper surface of the third portion, and
wherein the first portion is integral with the second portion.

7. The display device of claim 6 ,
wherein the active layer has an entire flat bottom surface,
wherein the capping layer covers a top surface of the first portion, and
wherein the capping layer is disposed between the top surface of the first portion and a bottom surface of the gate insulating layer.

8. The display device of claim 6 ,
wherein the capping layer further covers a lateral surface of an end portion of the first portion.

9. The display device of claim 6 ,
wherein the gate insulating layer directly contacts the second portion.

10. The display device of claim 6 ,
wherein the capping layer includes silicon oxide.

Assignees

• Samsung Display Co Ltd

Inventors

• Ebisuno Kohei
• Kim Sungjun
• Son Donghyun
• Jung Jaesoo
• Moon Sunghoon
• Jung Jingoo

Classifications

• H10P52/402

  of semiconductor materials · CPC title

• H10P14/69215

  the material being a silicon oxide, e.g. SiO2 · CPC title

• H10P14/3808 Primary

  using laser beams · CPC title

• H10P14/3806

  using crystallisation-enhancing elements · CPC title

• H10P14/3454

  Amorphous · CPC title