Memory device

Patent metadata

Field	Value
Publication number	US-11056504-B2
Application number	US-201916661040-A
Country	US
Kind code	B2
Filing date	Oct 23, 2019
Priority date	Oct 23, 2019
Publication date	Jul 6, 2021
Grant date	Jul 6, 2021

Abstract

A memory device includes a channel element, a memory element, and an electrode element. The channel element has an open ring shape. A memory cell is defined in the memory element between the channel element and the electrode element.

First claim

What is claimed is:

1. A memory device, comprising:
a first channel element and a second channel element each having an open ring shape, wherein opposing ends of the first channel element have a first convex curved sidewall surface and a second convex curved sidewall surface respectively, opposing ends of the second channel element have a third convex curved sidewall surface and a fourth convex curved sidewall surface respectively, wherein the opposing ends of the first channel element have a source side element and a drain side element respectively, a portion of the first channel element between the source side element and the drain side element has a size smaller than a size of the source side element, the size of the first channel element is smaller than a size of the drain side element;
an insulating layer disposed between the first convex curved sidewall surface of the first channel element and the third convex curved sidewall surface of the second channel element, and disposed between the second convex curved sidewall surface of the first channel element and the fourth convex curved sidewall surface of the second channel element, wherein the first channel element is insulated from the second channel element by the insulating layer;
a first memory element and a second memory element; and
a first electrode element and a second electrode element, wherein a first memory cell is defined in the first memory element between the first channel element and the first electrode element, and a second memory cell is defined in the second memory element between the second channel element and the second electrode element.

2. The memory device according to claim 1 , wherein the first channel element has a concave curved sidewall channel surface and a convex curved sidewall channel surface opposing to the concave curved sidewall channel surface, wherein the convex curved sidewall channel surface is opposing to the first convex curved sidewall surface and the second convex curved sidewall surface of the first channel element.

3. The memory device according to claim 1 , further comprising:
an insulating element having a convex curved sidewall insulating surface and a plane sidewall insulating surface adjacent to each other;
wherein the source side element has the first convex curved sidewall surface, the drain side element has the second convex curved sidewall surface, the first channel element is adjacent to the convex curved sidewall insulating surface, the source side element and the drain side element are extended beyond the plane sidewall insulating surface.

4. The memory device according to claim 3 , wherein the source side element and the drain side element are on the plane sidewall insulating surface of the insulating element.

5. The memory device according to claim 1 , wherein the source side element and the drain side element have a conductivity larger than a conductivity of the portion of the first channel element between the source side element and the drain side element.

6. The memory device according to claim 1 , wherein the source side element has the first convex curved sidewall surface, the drain side element has the second convex curved sidewall surface, the source side element, the drain side element and the portion of the first channel element between the source side element and the drain side element comprise single crystal silicon or polysilicon.

7. The memory device according to claim 6 , further comprising a metal silicide layer on the first convex curved sidewall surface of the source side element and on the second convex curved sidewall surface of the drain side element.

8. The memory device according to claim 1 , wherein the first memory element comprises a concave curved sidewall memory surface, a convex curved sidewall memory surface, and a sidewall memory plane between the concave curved sidewall memory surface and the convex curved sidewall memory surface, wherein the first channel element is adjacent to the concave curved sidewall memory surface.

9. The memory device according to claim 1 , wherein the first memory element comprises a concave curved sidewall memory surface, a convex curved sidewall memory surface, and a sidewall memory plane between the concave curved sidewall memory surface and the convex curved sidewall memory surface, the first electrode element has a sidewall electrode surface coplanar with the sidewall memory plane of the first memory element.

10. The memory device according to claim 1 , comprising a plurality of the first electrode elements disposed on a sidewall surface of the first memory element along a vertical direction and separated from each other, wherein a plurality of the first memory cells is defined in the first memory element between the first channel element and the plurality of the first electrode elements.

11. The memory device according to claim 1 , further comprising:
an insulating element between the insulating layer and the first channel element.

12. The memory device according to claim 1 ,
wherein the first memory element has an open ring shape.

13. The memory device according to claim 12 , wherein the first memory element comprises a concave curved sidewall memory surface and a convex curved sidewall memory surface opposing to the concave curved sidewall memory surface.

14. The memory device according to claim 13 , wherein the first memory element further comprises a sidewall memory plane between the concave curved sidewall memory surface and the convex curved sidewall memory surface.

15. The memory device according to claim 14 , wherein the sidewall memory plane is coplanar with a sidewall electrode surface of the first electrode element.

16. The memory device according to claim 13 , wherein the first channel element is on the concave curved sidewall memory surface, the first electrode element is on the convex curved sidewall memory surface.

17. The memory device according to claim 12 , wherein the source side element has the first convex curved sidewall surface, the drain side element has the second convex curved sidewall surface, the portion of the first channel element between the source side element and the drain side element has a convex curved sidewall channel surface opposing to the first convex curved sidewall surface and the second convex curved sidewall surface.

Assignees

• Macronix Int Co Ltd

Inventors

• Jiang Yu-Wei
• Chiou Jia-Rong

Classifications

• H10P50/642

  Chemical etching · CPC title

• H10P50/283

  by chemical means · CPC title

• H10P14/69433

  the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz · CPC title

• H10P14/69215

  the material being a silicon oxide, e.g. SiO2 · CPC title

• H10D64/252

  for vertical or pseudo-vertical devices · CPC title