Thermally adaptive quality-of-service

Patent metadata

Field	Value
Publication number	US-11054873-B2
Application number	US-201816113397-A
Country	US
Kind code	B2
Filing date	Aug 27, 2018
Priority date	May 30, 2014
Publication date	Jul 6, 2021
Grant date	Jul 6, 2021

Abstract

A method and apparatus of a device that manages a thermal profile of a device by selectively throttling central processing unit operations of the device is described. The device manages a thermal profile of the device by adjusting a throttling a central processing unit execution of a historically high energy consuming task. In this embodiment, the device monitors thermal level of the thermal profile of the device, the device is executing a plurality of tasks that utilize a plurality of processing cores of the device. If the thermal level of the device exceeds a thermal threshold, the device identifies one of the plurality of tasks as a historically high energy consuming task, and throttles this historically high energy consuming task by setting a force idle execution time for the historically high energy consuming task. The device further executes the plurality of tasks.

First claim

What is claimed is:

1. A non-transitory machine-readable medium having executable instructions to cause one or more processing units to perform a method to manage a thermal profile of a device, the method comprising:
monitoring a thermal level of the thermal profile of the device, wherein the device is executing a plurality of tasks that utilize a plurality of processing cores of the device;
scheduling the plurality of tasks to be executed on the plurality of processing cores during an execution window;
setting a processing frequency ceiling for each of the plurality of processing cores based on at least a quality of service for one of the plurality of tasks scheduled to be executed on that processing core and the thermal level of the device, wherein the processing frequency ceiling is less than 100% of a maximum frequency that a respective processing core can execute for an execution window; and
executing each of the plurality of tasks using the plurality of processing cores with a corresponding processing frequency that is restricted to less than or equal to the processing frequency ceiling for that processing core.

2. The non-transitory machine-readable medium of claim 1 , wherein each of the plurality of processing cores has the same processing frequency.

3. The non-transitory machine-readable medium of claim 1 , wherein the processing frequency ceiling for each of the plurality of processing cores can be different.

4. The non-transitory machine-readable medium of claim 1 , wherein the corresponding processing frequency for the plurality of processing cores can be reduced by a power management system of the device.

5. A method to manage a thermal profile of a device, the method comprising:
monitoring a thermal level of the thermal profile of the device, wherein the device is executing a plurality of tasks that utilize a plurality of processing cores of the device;
scheduling the plurality of tasks to be executed on the plurality of processing cores during an execution window;
setting a processing frequency ceiling for each of the plurality of processing cores based on at least a quality of service for one of the plurality of tasks scheduled to be executed on that processing core and the thermal level of the device, wherein the processing frequency ceiling is less than 100% of a maximum frequency that a respective processing core can execute for an execution window; and
executing each of the plurality of tasks using the plurality of processing cores with a corresponding processing frequency that is restricted to less than or equal to the processing frequency ceiling for that processing core.

6. The method of claim 5 , wherein each of the plurality of processing cores has the same processing frequency.

7. The method of claim 5 , wherein the processing frequency ceiling for each of the plurality of processing cores can be different.

8. The method of claim 5 , wherein the corresponding processing frequency for the plurality of processing cores can be reduced by a power management system of the device.

9. A device comprising:
a plurality of processing cores;
a memory coupled to the plurality of processing cores, the memory storing instructions which when executed by the device, cause the device to perform operations of:
monitoring a thermal level of a thermal profile of the device, wherein the device is executing a plurality of tasks that utilize the plurality of processing cores;
scheduling the plurality of tasks to be executed on the plurality of processing cores during an execution window;
setting a processing frequency ceiling for each of the plurality of processing cores based on at least a quality of service for one of the plurality of tasks scheduled to be executed on that processing core and the thermal level of the device, wherein the processing frequency ceiling is less than 100% of a maximum frequency that a respective processing core can execute for an execution window; and
executing each of the plurality of tasks using the plurality of processing cores with a corresponding processing frequency that is restricted to less than or equal to the processing frequency ceiling for that processing core.

10. The device of claim 9 , wherein each of the plurality of processing cores has the same processing frequency.

11. The device of claim 9 , wherein the processing frequency ceiling for each of the plurality of processing cores can be different.

12. The device of claim 9 , wherein the corresponding processing frequency for the plurality of processing cores can be reduced by a power management system of the device.

13. The non-transitory machine-readable medium of claim 1 , wherein the setting further comprises:
reducing a current processing frequency ceiling for the respective processing core based on at least a comparison of the thermal level and a threshold.

14. The non-transitory machine-readable medium of claim 1 , wherein the setting further comprises:
increasing a current processing frequency ceiling for the respective processing core based on at least a comparison of the thermal level and a threshold.

15. The method of claim 5 , wherein the setting further comprises:
reducing a current processing frequency ceiling for the respective processing core based on at least a comparison of the thermal level and a threshold.

16. The method of claim 5 , wherein the setting further comprises:
increasing a current processing frequency ceiling for the respective processing core based on at least a comparison of the thermal level and a threshold.

17. The device of claim 9 , wherein the setting further comprises:
reducing a current processing frequency ceiling for the respective processing core based on at least a comparison of the thermal level and a threshold.

18. The device of claim 9 , wherein the setting further comprises:
increasing a current processing frequency ceiling for the respective processing core based on at least a comparison of the thermal level and a threshold.

Assignees

• Apple Inc

Inventors

• Kumar Derek R

Classifications

• G06F1/3296

  by lowering the supply or operating voltage · CPC title

• G06F1/324

  by lowering clock frequency · CPC title

• G06F9/4893

  taking into account power or heat criteria (power management in computers in general G06F1/3203; thermal management in computers in general G06F1/206) · CPC title

• Y02D10/00

  Energy efficient computing, e.g. low power processors, power management or thermal management · CPC title

• G06F1/3287

  by switching off individual functional units in the computer system · CPC title