Parasitic insensitive sampling in sensors

Patent metadata

Field	Value
Publication number	US-11054328-B2
Application number	US-201916294824-A
Country	US
Kind code	B2
Filing date	Mar 6, 2019
Priority date	Mar 6, 2019
Publication date	Jul 6, 2021
Grant date	Jul 6, 2021

Abstract

Methods and devices to mitigate time varying impairments in sensors are described. The application of such methods and devices to pressure sensors facing time varying parasitic capacitances due to water droplets is detailed. Benefits of auto-zeroing technique as adopted in disclosed devices is also described.

First claim

The invention claimed is:

1. A sensor system comprising:
a sensor comprising a sense capacitor with a variable sense capacitance;
a readout integrated circuit comprising an analog to digital converter (ADC) having an ADC input connected to the sense capacitor, and
an offset capacitor operatively charged and discharged out of phase with respect to the sense capacitor;
wherein:
a variable parasitic capacitance is able to be coupled to the ADC input; and
when an input pressure is sensed by the sensor, the variable sense capacitance is modulated, thereby generating one or more ADC output signals in correspondence of the input pressure.

2. The sensor system of claim 1 , wherein the sense capacitor is serially connected with the ADC input.

3. The sensor system of claim 1 , wherein the ADC comprises a sigma-delta modulator.

4. The sensor system of claim 3 , wherein the sigma-delta modulator is a multi-stage noise shaping (MASH) modulator comprising one or more integrators interconnected with one or more comparators.

5. The sensor system of claim 4 , further comprising a decimation filter connected with the sigma-delta modulator.

6. The sensor system of claim 1 , wherein the sensor further comprises a feedback capacitor, and wherein the offset capacitor is configured to center variations of the sense capacitor to a center of a full-scale of the ADC, the full-scale of the ADC being set by the feedback capacitor.

7. The sensor system of claim 1 , wherein effects of the variable parasitic capacitance on the one or more ADC output signals are reduced using an auto-zeroing or chopping technique.

8. The sensor system of claim 6 , further comprising an integrator including an operational amplifier and integration capacitor, an operational amplifier input being the ADC input.

9. The sensor system of claim 8 , configured to receive a plurality of reference voltages and further comprising a switching arrangement being controlled by a plurality of clock signals to connect/disconnect the sense capacitor, the offset capacitor, and the feedback capacitor to/from corresponding reference voltages of the plurality of reference voltages.

10. The sensor system of claim 9 , wherein the plurality of clock signals comprises clock signals that are generated based on the one or more ADC output signals.

11. The sensor system of claim 10 , wherein:
in a charging phase:
the switching arrangement is configured such that the plurality of reference voltages are sampled to store charges across the sense capacitor, the offset capacitor and the feedback capacitor; and

in an integration phase:
a combination of the charges stored on the sense capacitor, the offset capacitor and the feedback capacitor during the charging phase is transferred to the integrating capacitor, thereby generating an integrator output signal in correspondence of the input pressure.

12. The sensor system of claim 11 , wherein undesired charges due to the variable parasitic capacitance are sampled before the charging phase and are compensated for while generating the integrator output signal.

13. The sensor system of claim 11 , wherein the plurality of clock signals have clock periods substantially smaller than a time during which the variable parasitic capacitance varies by one pF.

14. The sensor system of claim 11 , wherein the plurality of clock signals have clocks rates in the range of hundreds of KHz and the variable parasitic capacitance varies within a range of tens of pf and having a rate of change within a range of tens of pF/msec.

15. The sensor system of claim 9 , wherein the switching arrangement comprises metal-oxide semiconductor field-effect (MOSFET) transistors.

16. The sensor system of claim 1 , wherein the sensor is a MEMS sensor.

17. The sensor system of claim 1 , further comprising a gel material configured to transfer sensed pressure to the readout integrated circuit.

18. The sensor system of claim 17 , wherein the sensor is connected to the readout integrated circuit via bondwires that are exposed to the gel material.

19. A method of measuring pressure comprising:
providing a sense capacitor with a variable sense capacitance;
providing an offset capacitor;
providing a readout circuit having an integrating capacitor, wherein a variable parasitic capacitance is able to be generated across a readout circuit input;
in a charging phase,
storing first charges across the sense capacitor;
storing second charges across the offset capacitor;

in an integration phase, transferring the first and the second charges to the integrating capacitor, thereby generating a readout circuit output signal in correspondence of an input pressure; and
configuring the offset capacitor to center variations of the sense capacitor to a center of a full-scale of the readout circuit,
wherein the storing the first and the second charges and the transferring the first and the second charges are performed such that a charging and discharging of the offset capacitor is out of phase with respect to the sense capacitor.

20. The method of claim 19 , further comprising, before the charging phase, sampling the readout circuit input to capture undesired charges due to variable parasitic capacitance and compensate for the undesired charges during the integration phase.

21. The method of claim 20 , further comprising:
providing a feedback capacitor configured to set the full-scale of the readout circuit;
in the charging phase, sampling the first and the second reference voltage during set time intervals to store third charges across the feedback capacitor; and
in the integration phase, transferring the third charges to the integration capacitor.

22. The method of claim 21 , wherein the set time intervals are defined based on the readout circuit output signal.

23. The method of claim 22 , wherein the readout circuit further comprises one or more integrators interconnected with one or more comparators.

24. A method of detecting presence of water droplets sitting on a pressure sensor using the method of claim 19 , comprising comparing a measurement of the readout circuit output signal with a set threshold to detect presence or absence of water droplets.

Assignees

• Psemi Corp

Inventors

• Srinivasan Vishnu
• Opris Ion
• Bargroff Keith

Classifications

• H03M3/494

  Sampling or signal conditioning arrangements specially adapted for delta-sigma type analogue/digital conversion systems · CPC title

• H03M7/3022

  having multiple quantisers arranged in cascaded loops, each of the second and further loops processing the quantisation error of the loop preceding it, i.e. multiple stage noise shaping [MASH] type · CPC title

• H03M3/458

  Analogue/digital converters using delta-sigma modulation as an intermediate step · CPC title

• H03M3/414 Primary

  having multiple quantisers arranged in cascaded loops, each of the second and further loops processing the quantisation error of the loop preceding it, i.e. multiple stage noise shaping [MASH] type · CPC title

• H03M3/438

  the modulator having a higher order loop filter in the feedforward path · CPC title