Methods and communication apparatuses for bit-to-symbol mapping

US11050602B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11050602-B2
Application numberUS-201816650839-A
CountryUS
Kind codeB2
Filing dateSep 11, 2018
Priority dateSep 27, 2017
Publication dateJun 29, 2021
Grant dateJun 29, 2021

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

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Methods and communication apparatuses are presented for bit-to-symbol mapping. The method for bit-to-symbol mapping according to one example of the present invention includes: obtaining a plurality of base constellation maps; and mapping an input bit sequence by using the plurality of base constellation maps to generate symbols to be transmitted.

First claim

Opening claim text (preview).

What is claimed is: 1. A terminal comprising: a processor; and a storage medium having computer program instructions stored thereon, wherein the computer program instructions, when executed by the processor, perform processing of: obtaining a plurality of base constellation maps; mapping an input bit sequence by using the plurality of base constellation maps to generate symbols to be transmitted; and generating a plurality of information bit groups according to the input bit sequence; wherein the processor determines a target constellation map in the plurality of base constellation maps according to a part of information bit groups of the plurality of information bit groups, and maps other information bit groups of the plurality of information bit groups except the part of information bit groups by using the target constellation map to generate the symbols to be transmitted. 2. The terminal of claim 1 , further comprising: wherein the processor is further configured to generate a plurality of information bit groups according to the input bit sequence, wherein obtaining unit determines base constellation maps corresponding to respective information bit groups of the plurality of information bit groups, maps corresponding information bit groups by using the determined constellation maps, respectively, to obtain initial constellation points, and superimposes the obtained initial constellation points to generate the symbols to be transmitted. 3. The terminal of claim 1 , wherein each of the plurality of base constellation maps includes: an initial constellation map and an adjustment factor. 4. The terminal of claim 2 , wherein the processor is configured to adjust the respective initial constellation points by adjustment factors, and superimpose the adjusted initial constellation points to generate the symbols to be transmitted. 5. The terminal of claim 4 , wherein the adjustment factors include power factors and/or phase rotations. 6. The terminal of claim 5 , wherein a plurality of sub-channels are included in one symbol, and the adjustment factors are determined according to channel capacities required for the respective sub-channels. 7. A terminal comprising: a processor; and a storage medium having computer program instructions stored thereon, wherein the computer program instructions, when executed by the processor, perform processing of: determining priority of data in an input bit sequence; and mapping the input bit sequence by using a constellation map according to the determined priority and reliability of respective sub-channels included in one symbol to generate symbols to be transmitted, wherein a specific sub-channel of the plurality of sub-channels has a plurality of values, and wherein a pattern of a first constellation map formed by remaining sub-channels other than the specific sub-channel from the plurality of sub-channels when a value of the specific sub-channel is one value of the plurality of values is the same as a pattern of a second constellation map formed by remaining sub-channels other than the specific sub-channel from the plurality of sub-channels when a value of the specific sub-channel is another value of the plurality of values. 8. The terminal of 7 , wherein the processor is configured to map data with a high priority in the input bit sequence to a sub-channel with a high reliability in the symbol, and map data with a low priority in the input bit sequence to a sub-channel with a low reliability in the symbol. 9. A base station comprising: a processor; and a storage medium having computer program instructions stored thereon, wherein the computer program instructions, when executed by the processor, perform processing of: obtaining a plurality of base constellation maps; mapping an input bit sequence by using the plurality of base constellation maps to generate symbols to be transmitted; and generating a plurality of information bit groups according to the input bit sequence, wherein the processor determines a target constellation map in the plurality of base constellation maps according to a part of information bit groups of the plurality of information bit groups, and maps other information bit groups of the plurality of information bit groups except the part of information bit groups by using the target constellation map to generate the symbols to be transmitted. 10. The base station of claim 9 , wherein each of the plurality of base constellation maps includes: an initial constellation map and an adjustment factor. 11. The base station of claim 9 , wherein the processor is further configured to generate a plurality of information bit groups according to the input bit sequence, wherein the processor determines base constellation maps corresponding to respective information bit groups of the plurality of information bit groups; the mapping unit maps corresponding information bit groups by using the determined constellation maps, respectively, to obtain initial constellation points, and superimposes the obtained initial constellation points to generate the symbols to be transmitted. 12. The base station of claim 11 , wherein the processor is configured to adjust the respective initial constellation points by adjustment factors, and superimpose the adjusted initial constellation points to generate the symbols to be transmitted. 13. The base station of claim 12 , wherein the adjustment factors include power factors and/or phase rotations. 14. The base station of claim 13 , wherein a plurality of sub-channels are included in one symbol, and the adjustment factors are determined according to channel capacities required for the respective sub-channels.

Assignees

Inventors

Classifications

  • in which the phase change per symbol period is not constrained · CPC title

  • Arrangements for detecting or preventing errors in the information received {(correcting synchronisation H04L7/00)} · CPC title

  • Modulator circuits; Transmitter circuits · CPC title

  • H04L27/20Primary

    Modulator circuits; Transmitter circuits · CPC title

  • using an underlying square constellation · CPC title

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What does patent US11050602B2 cover?
Methods and communication apparatuses are presented for bit-to-symbol mapping. The method for bit-to-symbol mapping according to one example of the present invention includes: obtaining a plurality of base constellation maps; and mapping an input bit sequence by using the plurality of base constellation maps to generate symbols to be transmitted.
Who is the assignee on this patent?
Ntt Docomo Inc
What technology area does this patent fall under?
Primary CPC classification H04L27/20. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jun 29 2021 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).