Electronically adjustable inductor circuit

Patent metadata

Field	Value
Publication number	US-11050402-B2
Application number	US-201916575850-A
Country	US
Kind code	B2
Filing date	Sep 19, 2019
Priority date	Sep 19, 2019
Publication date	Jun 29, 2021
Grant date	Jun 29, 2021

Abstract

Circuits and methods for electronically adjusting an effective inductance of one or more primary inductors in a circuit. The circuit may include a plurality of sub-circuits connected in parallel between an input and an output of the circuit. Each sub-circuit may include a primary inductor and an auxiliary inductor inductively coupled to the primary inductor. The circuit may further include first circuitry coupled to the primary inductor, wherein the first circuitry configured to introduce an oscillating first voltage across the primary inductor; and second circuitry coupled to the auxiliary inductor, wherein the second circuitry is configured to introduce an oscillating second voltage across the auxiliary inductor. The amplitudes of the second voltages may be selected to reduce a difference between effective inductances of the primary inductors.

First claim

I claim:

1. A circuit, comprising:
a plurality of sub-circuits connected in parallel between an input and an output of the circuit, wherein each sub-circuit of the plurality of sub-circuits comprises:
a respective primary inductor; and
respective first circuitry coupled to the primary inductor, wherein the first circuitry is configured to introduce a respective oscillating first voltage across the primary inductor; and

wherein at least one sub-circuit of the plurality of sub-circuits further comprises:
a respective auxiliary inductor inductively coupled to the respective primary inductor;
respective second circuitry coupled to the auxiliary inductor, wherein the second circuitry is configured to introduce a respective oscillating second voltage across the auxiliary inductor; and
a control element configured to select an amplitude of the oscillating second voltage of the respective subcircuit, wherein the amplitude is selected to reduce a difference between an effective inductance of the primary inductor of the respective sub-circuit and an effective inductance of at least one primary inductor of another sub-circuit of the plurality of sub-circuits.

2. The circuit of claim 1 ,
wherein the respective first voltages and the respective second voltages oscillate with a common period.

3. The circuit of claim 1 ,
wherein each second circuitry comprises a respective direct current (DC) trim voltage source coupled to the respective first voltage, and
wherein the amplitudes of the second voltages are adjusted by adjusting magnitudes of the respective DC trim voltages.

4. The circuit of claim 3 ,
wherein, for the at least one sub-circuit:
the respective second circuitry further comprises respective switch circuitry configurable in a first state and a second state,
wherein, while the switch circuitry is in the first state, the respective second voltage oscillates in phase with the respective first voltage, and
wherein, while the switch circuitry is in the second state, the respective second voltage oscillates 180° out-of-phase with the respective first voltage.

5. The circuit of claim 1 ,
wherein the respective first voltage introduced across a first one of the primary inductors and the respective second voltage introduced across a first one of the auxiliary inductors oscillate in phase, and
wherein the effective inductance of the first one of the primary inductors is greater than a physical inductance of the first one of the primary inductors.

6. The circuit of claim 1 ,
wherein respective the first voltage introduced across a first one of the primary inductors and the respective second voltage introduced across a first one of the auxiliary inductors oscillate 180° out-of-phase, and
wherein the effective inductance of the first one of the primary inductors is lower than a physical inductance of the first one of the primary inductors.

7. The circuit of claim 1 ,
wherein the circuit is a programmable load circuit,
wherein each sub-circuit further comprises:
a respective switch that is configurable in a first state and a second state, wherein while the switch is in the first state the primary inductor of the respective sub-circuit is connected to the output through a load, and wherein while the switch is in the second state a connection is established between the primary inductor of the respective sub-circuit and the output that bypasses the load;

wherein the switches of the plurality of sub-circuits are configured to periodically switch between the first state and the second state with a period corresponding to a period of oscillation of the first voltages, wherein the switches are out of phase with each other by a fixed amount, and wherein the fixed amount is selected to reduce a variance over time in a summation over currents passing through the plurality of sub-circuits.

8. A circuit, comprising:
a plurality of sub-circuits, wherein each sub-circuit of the plurality of sub-circuits comprises:
a respective primary inductor; and
respective first circuitry coupled to the primary inductor, wherein the first circuitry is configured to introduce an oscillating first voltage across the primary inductor; and

wherein at least one sub-circuit of the plurality of sub-circuits further comprises:
a respective auxiliary inductor inductively coupled to the respective primary inductor;
respective second circuitry coupled to the auxiliary inductor, wherein the second circuitry is configured to introduce an oscillating second voltage across the auxiliary inductor; and
a control element configured to select an amplitude of the oscillating second voltage of the respective sub-circuit, wherein the amplitude is selected to reduce a difference between an effective inductance of the primary inductor of the respective sub-circuit and an effective inductance of at least one primary inductor of another sub-circuit of the plurality of sub-circuits.

9. The circuit of claim 8 ,
wherein the respective first voltages and the respective second voltages oscillate with a common period.

10. The circuit of claim 8 ,
wherein each second circuitry comprises a respective direct current (DC) trim voltage source coupled to the respective first voltage, and
wherein the amplitudes of the second voltages are adjusted by adjusting magnitudes of the respective DC trim voltages.

11. The circuit of claim 10 ,
wherein, for the at least one sub-circuit:
the respective second circuitry further comprises respective switch circuitry configurable in a first state and a second state,

wherein, while the switch circuitry is in the first state, the respective second voltage oscillates in phase with the respective first voltage, and
wherein, while the switch circuitry is in the second state, the respective second voltage oscillates 180° out-of-phase with the respective first voltage.

12. The circuit of claim 8 ,
wherein the respective first voltage introduced across a first one of the primary inductors and the respective second voltage introduced across a first one of the auxiliary inductors oscillate in phase, and
wherein the effective inductance of the first one of the primary inductors is greater than a physical inductance of the first one of the primary inductors.

13. The circuit of claim 8 ,
wherein the respective first voltage introduced across a first one of the primary inductors and the respective second voltage introduced across a first one of the auxiliary inductors oscillate 180° out-of-phase, and
wherein the effective inductance of the first one of the primary inductors is lower than a physical inductance of the first one of the primary inductors.

14. The circuit of claim 8 ,
wherein the control element is further configured to:
measure a mismatch between effective inductances of the respective primary inductors;
automatically direct the respective second circuities to adjust the respective second voltages based at least in part on the mismatch.

15. A programmable load circuit, comprising:
a plurality of sub-circuits connected in parallel between an input and an output of the programmable load circuit, wherein each sub-circuit of the plurality of sub-circuits comprises:
a respective primary inductor;
a respective load; and
respective first circuitry coupled to the primary inductor, wherein the first circuitry is configured to introduce a respective oscillating first voltage across the primary inductor;

wherein at least one sub-circuit of the plurality of sub-circuits further comprises:
an auxiliary inductor inductively coupled to the primary inductor;
respective second circuitry coupled

Assignees

• Nat Instruments Corp

Inventors

• Cheah Chin-Hong

Classifications

• H02M3/1584

  with a plurality of power processing stages connected in parallel · CPC title

• H03H5/12

  with at least one voltage- or current-dependent element · CPC title

• H02M3/1586

  switched with a phase shift, i.e. interleaved · CPC title

• H01F27/42 Primary

  Circuits specially adapted for the purpose of modifying, or compensating for, electric characteristics of transformers, reactors, or choke coils (circuits for controlling transformers, reactors or choke coils, for the purpose of obtaining a desired output H02P13/00; impedance networks H03H) · CPC title

• H02M1/14

  Arrangements for reducing ripples from DC input or output · CPC title