Display device and method of manufacturing the same

US11049929B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11049929-B2
Application numberUS-202016804152-A
CountryUS
Kind codeB2
Filing dateFeb 28, 2020
Priority dateJun 14, 2019
Publication dateJun 29, 2021
Grant dateJun 29, 2021

How to read this patent

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A display device includes: a substrate; a first thin film transistor and a second thin film transistor arranged over the substrate; a display element connected to the first thin film transistor; a wiring connected to the second thin film transistor and including a first wiring layer and a second wiring layer; a pattern insulating layer arranged between the first wiring layer and the second wiring layer; a planarization layer covering the wiring; and a connection electrode arranged on the planarization layer and connected to the first wiring layer and the second wiring layer respectively through a first contact hole and a second contact hole.

First claim

Opening claim text (preview).

What is claimed is: 1. A display device comprising: a substrate; a first thin film transistor disposed over the substrate; a second thin film transistor disposed over the substrate; a display element connected to the first thin film transistor; a wiring connected to the second thin film transistor, wherein the wiring includes a first wiring layer and a second wiring layer disposed on a different layer than the first wiring layer; a pattern insulating layer disposed between the first wiring layer and the second wiring layer; a planarization layer covering the wiring; and a connection electrode disposed on the planarization layer and connected to the first wiring layer and the second wiring layer through a first contact hole and a second contact hole, respectively. 2. The display device of claim 1 , wherein a bottom surface of the second wiring layer has a same area as an entirety of an area defining a top surface of the pattern insulating layer. 3. The display device of claim 1 , wherein a lateral surface of the second wiring layer is connected to a lateral surface of the pattern insulating layer. 4. The display device of claim 1 , wherein the display element includes a pixel electrode, an emission layer, and an opposite electrode, and the connection electrode includes a same material as a material of the pixel electrode and is disposed in a same layer as the pixel electrode. 5. The display device of claim 1 , wherein an area of the first wiring layer is different from an area of the second wiring layer. 6. The display device of claim 1 , wherein the planarization layer contacts a lateral surface of the pattern insulating layer. 7. The display device of claim 1 , further comprising: a capacitor including a first electrode and a second electrode, wherein the first electrode including a same material as a material of a gate electrode of the first thin film transistor, and the second electrode overlaps the first electrode, includes a same material as a material of the first wiring layer, and is disposed in a same layer as the first wiring layer. 8. The display device of claim 1 , further comprising: a bias electrode disposed below the first thin film transistor. 9. The display device of claim 8 , wherein the bias electrode is connected to a source electrode or a drain electrode of the first thin film transistor. 10. The display device of claim 1 , wherein the wiring includes a data line which provides a data signal to the second thin film transistor. 11. The display device of claim 1 , further comprising: a thin-film encapsulation layer covering the display element, wherein the thin-film encapsulation layer includes a first inorganic encapsulation layer, an organic encapsulation layer and a second inorganic encapsulation layer, which are stacked one on another. 12. The display device of claim 1 , further comprising: a sealing substrate disposed opposite to the substrate.

Assignees

Inventors

Classifications

  • Encapsulations · CPC title

  • Self-supporting sealing arrangements · CPC title

  • comprising structures specially adapted for lowering the resistance · CPC title

  • having light shields · CPC title

  • integrated with passive devices, e.g. auxiliary capacitors · CPC title

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Frequently asked questions

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What does patent US11049929B2 cover?
A display device includes: a substrate; a first thin film transistor and a second thin film transistor arranged over the substrate; a display element connected to the first thin film transistor; a wiring connected to the second thin film transistor and including a first wiring layer and a second wiring layer; a pattern insulating layer arranged between the first wiring layer and the second wiri…
Who is the assignee on this patent?
Samsung Display Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10D30/6723. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jun 29 2021 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 4 related publications on this page (citations in our corpus or others sharing the same primary CPC).