Display device

Patent metadata

Field	Value
Publication number	US-11049913-B2
Application number	US-201916421795-A
Country	US
Kind code	B2
Filing date	May 24, 2019
Priority date	Oct 1, 2018
Publication date	Jun 29, 2021
Grant date	Jun 29, 2021

Abstract

A display device includes a substrate, a light emitting element located on the substrate, an encapsulation layer covering the light emitting element, a sensing electrode located on the encapsulation layer, a first sensing line including a first portion having a first thickness and a second portion having a second thickness, and a second sensing line extended from the sensing electrode. The second sensing line is in contact with the first portion of the first sensing line. The first thickness and the second thickness are substantially the same. The first portion is positioned higher than the second portion from the substrate.

First claim

What is claimed is:

1. A display device comprising:
a substrate;
a light emitting element located on the substrate;
an encapsulation layer covering the light emitting element;
a sensing electrode located on the encapsulation layer;
a first sensing line including a first portion and a second portion,
wherein the first portion is positioned higher than the second portion from the substrate;
a second sensing line extended from the sensing electrode, the second sensing line including a third portion being in contact with the first portion of the first sensing line; and
a planarization layer located on the substrate, the planarization layer, in top down view, being spaced apart from a region of the substrate covered by the encapsulation layer,
wherein the first portion of the first sensing line, the second portion of the first sensing line, and the third portion of the second sensing line are disposed on the planarization layer.

2. The display device of claim 1 , further comprising:
a pad electrode located on the substrate, the pad electrode being spaced apart from the planarization layer;
a transistor electrically connected to the light emitting element; and
a first insulating layer group covering a portion of the transistor,
wherein the second portion of the first sensing line is extended on the planarization layer,
wherein the second portion of the first sensing line is electrically connected to the pad electrode,
wherein one end of the planarization layer covers the first insulating layer group, and
wherein the first portion of the first sensing line and the second sensing line are in contact with each other on the one end of the planarization layer.

3. The display device of claim 2 , further comprising:
a second insulating layer group supporting the pad electrode; and
a first trench between the first insulating layer group and the second insulating layer group,
wherein a portion of the planarization layer fills the first trench, wherein an upper surface of the one end of the planarization layer is higher than an upper surface of the portion of the planarization layer from the substrate.

4. The display device of claim 3 ,
wherein the one end of the planarization layer is interposed between the first portion of the first sensing line and the first insulating layer group, and
wherein the second portion of the first sensing line is disposed on the portion of the planarization layer filling the first trench.

5. The display device of claim 4 ,
wherein the first insulating layer group includes a first gate insulating layer and an interlayer insulating layer,
wherein the first gate insulating layer covers a channel of the transistor, and
the interlayer insulating layer covers a gate electrode of the transistor.

6. The display device of claim 5 , further comprising:
a passivation layer covering a source electrode and a drain electrode of the transistor,
wherein the passivation layer partially covers the first sensing line.

7. The display device of claim 6 ,
wherein the passivation layer includes a first opening that exposes the first portion of the first sensing line, and
wherein the second sensing line is in contact with the first portion of the first sensing line through the first opening.

8. The display device of claim 7 , further comprising:
a first via layer covering the passivation layer and the transistor; and
a first line protective layer covering the planarization layer and the first sensing line.

9. The display device of claim 8 ,
wherein one end of the encapsulation layer is located between the first via layer and the first line protective layer.

10. The display device of claim 9 ,
wherein the first line protective layer includes an opening connected to the first opening.

11. The display device of claim 10 , further comprising:
a third sensing line,
wherein the second insulating layer group includes a second opening that exposes the third sensing line, and
wherein the first sensing line is in contact with the third sensing line through the second opening.

12. The display device of claim 11 ,
wherein the planarization layer includes an opening connected to the second opening.

13. The display device of claim 12 ,
wherein the first sensing line is formed of the same material as the source electrode or the drain electrode of the transistor.

14. The display device of claim 13 ,
wherein the third sensing line is formed of the same material as the gate electrode of the transistor.

15. The display device of claim 6 , further comprising:
a third sensing line; and
a fourth sensing line connecting the third sensing line and the first sensing line,
wherein the second insulating layer group further includes a second opening that exposes the third sensing line and is covered by the fourth sensing line.

16. The display device of claim 15 ,
wherein the planarization layer includes an opening that exposes the fourth sensing line and is connected to the second opening.

17. The display device of claim 16 , further comprising:
a first via layer covering the transistor;
a connecting pattern connected to the source electrode or the drain electrode of the transistor through an opening of the first via layer;
a second via layer covering the first via layer and the connecting pattern; and
a first electrode of the light emitting element, wherein the first electrode of the light emitting element is connected to the connecting pattern through an opening of the second via layer.

18. The display device of claim 17 ,
wherein the first sensing line is formed of the same material as the connecting pattern.

19. The display device of claim 18 ,
wherein the third sensing line is formed of the same material as the gate electrode of the transistor.

20. The display device of claim 19 ,
wherein the fourth sensing line is formed of the same material as the source electrode or the drain electrode of the transistor.

21. The display device of claim 1 ,
wherein the first portion has a first thickness,
wherein the second portion has a second thickness, and
wherein the first thickness and the second thickness are substantially the same.

Assignees

• Samsung Display Co Ltd

Inventors

• Choi Jun Won
• Hwang Won Mi
• Min Jun Young
• Jung Kwang Chul

Classifications

• H10K59/873

  Encapsulations · CPC title

• H10K59/40

  OLEDs integrated with touch screens · CPC title

• G06F3/0412 Primary

  Digitisers structurally integrated in a display · CPC title

• G06F3/0446

  using a grid-like structure of electrodes in at least two directions, e.g. using row and column electrodes · CPC title

• G06F3/04164

  Connections between sensors and controllers, e.g. routing lines between electrodes and connection pads · CPC title