Display device performing multi-frequency driving

Patent metadata

Field	Value
Publication number	US-11049451-B2
Application number	US-202016888284-A
Country	US
Kind code	B2
Filing date	May 29, 2020
Priority date	Jul 26, 2019
Publication date	Jun 29, 2021
Grant date	Jun 29, 2021

Abstract

A display device including: a controller including: a zone splitting block configured to divide input image data into a plurality of partial image data respectively corresponding to a plurality of partial panel zones of the display panel; a plurality of panel zone frequency deciding blocks configured to determine a plurality of driving frequencies for the plurality of partial panel zones by analyzing the plurality of partial image data, respectively; a non-driving period setting block configured to classify a plurality of frame periods into a driving frame period and a non-driving frame period based on a maximum driving frequency of the plurality of driving frequencies; and a scan driver control block configured to provide the scan driver input signal to the scan driver in the driving frame period, and to not provide the scan driver input signal to the scan driver in the non-driving frame period.

First claim

What is claimed is:

1. A display device comprising:
a display panel including a plurality of pixels;
a data driver configured to provide data signals to the plurality of pixels;
a scan driver configured to provide scan signals to the plurality of pixels based on a scan driver input signal including a scan start signal and a scan clock signal; and
a controller configured to control the data driver and the scan driver, the controller including:
a zone splitting block configured to divide input image data into a plurality of partial image data respectively corresponding to a plurality of partial panel zones of the display panel;
a plurality of panel zone frequency deciding blocks configured to determine a plurality of driving frequencies for the plurality of partial panel zones by analyzing the plurality of partial image data, respectively;
a non-driving period setting block configured to classify a plurality of frame periods into a driving frame period and a non-driving frame period based on a maximum driving frequency of the plurality of driving frequencies; and
a scan driver control block configured to provide the scan driver input signal to the scan driver in the driving frame period, and to not provide the scan start signal and the scan clock signal to the scan driver in the non-driving frame period.

2. The display device of claim 1 , wherein the controller further includes a power block configured to generate a high gate voltage and a low gate voltage,
wherein the scan driver control block includes:
a scan driver input signal generating unit configured to generate an initial scan start signal and an initial scan clock signal; and
a level shifting unit configured to generate, as the scan driver input signal, the scan start signal and the scan clock signal by changing voltage levels of the initial scan start signal and the initial scan clock signal based on at least one of the high gate voltage and the low gate voltage, and

wherein, in the non-driving frame period, the power block is configured to change the at least one of the high gate voltage and the low gate voltage to an off level.

3. The display device of claim 1 , wherein the scan driver control block is configured to provide a scan output masking signal to the scan driver in a partial period of the driving frame period assigned to a portion of the plurality of partial panel zones such that the scan signals are not provided to the portion of the plurality of partial panel zones within the driving frame period.

4. The display device of claim 3 , wherein the scan driver includes:
a plurality of stages configured to generate the scan signals for a plurality of scan lines included in the display panel; and
a plurality of logic gates respectively connected to the plurality of stages, and configured to selectively output the scan signals generated by the plurality of stages in response to the scan output masking signal, respectively.

5. The display device of claim 1 , wherein the display device is a foldable display device,
wherein the plurality of partial panel zones include a first partial panel zone located in a first direction from a folding line of the foldable display device, and a second partial panel zone located in a second direction opposite to the first direction from the folding line, and
wherein the zone splitting block is configured to divide the input image data into, as the plurality of partial image data, first partial image data for the first partial panel zone and second partial image data for the second partial panel zone.

6. The display device of claim 1 , wherein each of the plurality of panel zone frequency deciding blocks includes:
a still image detecting unit configured to receive corresponding partial image data of the plurality of partial image data at an input frame frequency, and to determine whether the corresponding partial image data represent a still image; and
a driving frequency deciding unit configured to determine a corresponding driving frequency of the plurality of driving frequencies as the input frame frequency when the corresponding partial image data do not represent the still image, and to determine the corresponding driving frequency as a frequency lower than the input frame frequency when the corresponding partial image data represent the still image.

7. The display device of claim 6 , wherein each of the plurality of panel zone frequency deciding blocks further includes:
a representative value memory configured to store a representative value of the corresponding partial image data in a previous frame period, and
wherein the still image detecting unit is configured to calculate a representative value of the corresponding partial image data in a current frame period, and to determine whether or not the corresponding partial image data represents the still image by comparing the calculated representative value of the corresponding partial image data with the representative value of the corresponding partial image data stored in the representative value memory.

8. The display device of claim 6 , wherein each of the plurality of panel zone frequency deciding blocks further includes:
a flicker lookup table configured to store flicker values corresponding to respective image data gray levels, and
wherein the driving frequency deciding unit is configured to determine, based on the corresponding partial image data representing the still image, a flicker value corresponding to a gray level of the corresponding partial image data by using the flicker lookup table, and to determine the corresponding driving frequency according to the determined flicker value.

9. The display device of claim 6 , wherein each of the plurality of panel zone frequency deciding blocks further includes:
a driving frequency mixing unit configured to gradually change a corresponding one of the plurality of driving frequencies for a corresponding partial panel zone of the plurality of partial panel zones from a previous driving frequency for the partial panel zone to the corresponding driving frequency determined by the driving frequency deciding unit when the corresponding driving frequency determined by the driving frequency deciding unit is changed from the previous driving frequency.

10. The display device of claim 1 , wherein each of the plurality of pixels includes:
a driving transistor configured to generate a driving current;
a switching transistor configured to transfer a corresponding one of the data signals to a source of the driving transistor;
a compensating transistor configured to diode-connect the driving transistor;
a storage capacitor configured to store the corresponding one of the data signals transferred through the switching transistor and the diode-connected driving transistor;
a first initializing transistor configured to provide an initialization voltage to the storage capacitor and a gate of the driving transistor;
a first emission controlling transistor configured to connect a line of a power supply voltage to the source of the driving transistor;
a second emission controlling transistor configured to connect a drain of the driving transistor to an organic light emitting diode;
a second initializing transistor configured to provide the initialization voltage to the organic light emitting diode; and
the organic light emitting diode configured to emit light based on the driving current,
wherein at least a first one of the driving transistor, the switching transistor, the compensating transistor, the first initializing transistor, the first emission controlling transistor, the second emission controlling transistor, or the second initializing transistor is implemented with a PMOS transistor,

Assignees

• Samsung Display Co Ltd

Inventors

• Park Sehyuk
• Kwon Sangan
• Kim Hongsoo
• Roh Jinyoung
• Lee Hyojin

Classifications

• G09G2330/02

  Details of power systems and of start or stop of display operation · CPC title

• G09G3/3208 Primary

  organic, e.g. using organic light-emitting diodes [OLED] · CPC title

• G09G3/2092 Primary

  Details of a display terminals using a flat panel, the details relating to the control arrangement of the display terminal and to the interfaces thereto (suitable for both CRT and flat panel G09G5/003; specific for a CRT G09G1/165) · CPC title

• G09G3/2085

  Special arrangements for addressing the individual elements of the matrix, other than by driving respective rows and columns in combination · CPC title

• G09G3/3266

  Details of drivers for scan electrodes · CPC title