Detection apparatus and method

US11047924B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11047924-B2
Application numberUS-201916382221-A
CountryUS
Kind codeB2
Filing dateApr 12, 2019
Priority dateApr 12, 2018
Publication dateJun 29, 2021
Grant dateJun 29, 2021

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

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Embodiments of application relate to the field of communications technologies, and in particular, to a detection apparatus and method for quickly locating a wire fault of a serial bus and finding a cause. The apparatus is connected to a serial bus between a primary device and a secondary device, the serial bus includes a first bus and a second bus, and the apparatus includes a voltage divider module, a voltage follower module, a forward bias module, and a control module that are sequentially connected. The voltage divider module is configured to reduce a voltage of the first bus and a voltage of the second bus. The voltage follower module is configured to enhance an electrical signal of the first bus and an electrical signal of the second bus. The forward bias module is configured to forward bias the voltage of the first bus and the voltage of the second bus.

First claim

Opening claim text (preview).

The invention claimed is: 1. A detection apparatus, wherein the apparatus is connected to a serial bus of a Serial Interface (RS) type, the serial bus is disposed between a primary device and a secondary device, the serial bus comprises a first bus and a second bus, and the apparatus comprises a voltage divider module, a voltage follower module, a forward bias module, and a control module that are sequentially connected, wherein the voltage divider module is configured to reduce a voltage of the first bus and a voltage of the second bus; the voltage follower module is configured to enhance an electrical signal of the first bus and an electrical signal of the second bus; the forward bias module is configured to forward bias the voltage of the first bus and the voltage of the second bus; and the control module is configured to: measure a digital voltage of the first bus and a digital voltage of the second bus, and determine, from a plurality of types of wire faults, a wire fault type of the serial bus based on the digital voltage of the first bus, the digital voltage of the second bus, and an electrical standard for the serial bus. 2. The apparatus according to claim 1 , wherein the first bus is a positive electrode bus, the second bus is a negative electrode bus, and the control module is further configured to: determine a differential digital voltage of the serial bus based on the digital voltage of the first bus and the digital voltage of the second bus; and determine the wire fault type of the serial bus based on the differential digital voltage and the electrical standard for the serial bus. 3. The apparatus according to claim 2 , wherein the first bus is further connected to a preset voltage, and the second bus is further connected to a ground cable. 4. The apparatus according to claim 3 , wherein the control module is configured to: when the serial bus is in an idle state, measure the digital voltage of the first bus and the digital voltage of the second bus; when the serial bus outputs a logical high level, measure the digital voltage of the first bus and the digital voltage of the second bus; and when the serial bus outputs a logical low level, measure the digital voltage of the first bus and the digital voltage of the second bus. 5. The apparatus according to claim 1 , wherein the first bus is a receive, RX bus, the second bus is a transmit, TX bus, and a ground cable of the primary device is connected to a ground cable of the secondary device. 6. The apparatus according to claim 5 , wherein the control module is configured to: measure the digital voltage of the first bus; when the second bus outputs a logical high level, measure the digital voltage of the second bus; and when the second bus outputs a logical low level, measure the digital voltage of the second bus. 7. The apparatus according to claim 6 , wherein the voltage divider module comprises two voltage division units, each voltage division unit corresponds to one bus, and the voltage division unit comprises a first resistor, a second resistor, and a capacitor, wherein a first end of the first resistor is connected to the bus, a second end of the first resistor is connected to a first end of the second resistor, a first end of the capacitor, and the voltage follower module, and a second end of the second resistor and a second end of the capacitor are connected to a ground cable. 8. The apparatus according to claim 7 , wherein the voltage follower module comprises two voltage followers, each voltage follower corresponds to one bus, the voltage follower comprises a first input end, a second input end, and an output end, and the output end is connected to the second input end and the forward bias module. 9. The apparatus according to claim 8 , wherein the forward bias module comprises two forward bias units, each forward bias unit corresponds to one bus, and the forward bias unit comprises a third resistor and a fourth resistor, wherein a first end of the third resistor is connected to the voltage follower module, a second end of the third resistor is connected to a first end of the fourth resistor and the control module, and a second end of the fourth resistor is connected to a reference voltage. 10. The apparatus according to claim 1 , wherein the plurality of types of wire faults include: a short circuit, an open circuit, a reversed connection, a line order error, cable bonding, improper installation of a cable, and/or connection miss. 11. A detection method, applied to a detection apparatus, wherein the apparatus is connected to a serial bus of a Serial Interface (RS) type, the serial bus is disposed between a primary device and a secondary device, the serial bus comprises a first bus and a second bus, and the method comprises: reducing a voltage of the first bus and a voltage of the second bus; enhancing an electrical signal of the first bus and an electrical signal of the second bus; forward biasing the voltage of the first bus and the voltage of the second bus; and measuring a digital voltage of the first bus and a digital voltage of the second bus, and determining, from a plurality of types of wire faults, a wire fault type of the serial bus based on the digital voltage of the first bus, the digital voltage of the second bus, and an electrical standard for the serial bus. 12. The method according to claim 11 , wherein the first bus is a positive electrode bus, the second bus is a negative electrode bus, and the determining a wire fault type of the serial bus based on the digital voltage of the first bus, the digital voltage of the second bus, and an electrical standard for the serial bus comprises: determining a differential digital voltage of the serial bus based on the digital voltage of the first bus and the digital voltage of the second bus; and determining the wire fault type of the serial bus based on the differential digital voltage and the electrical standard for the serial bus. 13. The method according to claim 11 , wherein the first bus is pulled up to a preset voltage, and the second bus is pulled down to a ground cable. 14. The method according to claim 13 , wherein the measuring a digital voltage of the first bus and a digital voltage of the second bus comprises: when the serial bus is in an idle state, measuring the digital voltage of the first bus and the digital voltage of the second bus; when the serial bus outputs a logical high level, measuring the digital voltage of the first bus and the digital voltage of the second bus; and when the serial bus outputs a logical low level, measuring the digital voltage of the first bus and the digital voltage of the second bus. 15. The method according to claim 11 , wherein the first bus is a receive (RX) bus, the second bus is a transmit (TX) bus, and a ground cable of the primary device is connected to a ground cable of the secondary device. 16. The method according to claim 15 , wherein the measuring a digital voltage of the first bus and a digital voltage of the second bus comprises: measuring the digital voltage of the first bus; when the second bus outputs a logical high level, measuring the digital voltage of the second bus; and when the second bus outputs a logical low level, measuring the digital voltage of the second bus. 17. The method according to claim 11 , wherein the plurality of types of wire faults include: a short circuit, an open circuit, a reversed connection, a line order error, cable bonding, improper installation of a cable, and/or connection miss.

Assignees

Inventors

Classifications

  • Resistors used for electric measuring, e.g. decade resistors standards, resistors for comparators, series resistors, shunts (resistors in general H01C; microwave or radiowave terminations H01P1/26; coupling devices H01R) · CPC title

  • on a serial bus, e.g. I2C bus, SPI bus (on daisy chain buses G06F13/4247) · CPC title

  • Serial port, e.g. RS232C · CPC title

  • G01R31/58Primary

    Testing of lines, cables or conductors (testing of electric windings G01R31/72) · CPC title

  • G01R31/081Primary

    according to type of conductors · CPC title

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What does patent US11047924B2 cover?
Embodiments of application relate to the field of communications technologies, and in particular, to a detection apparatus and method for quickly locating a wire fault of a serial bus and finding a cause. The apparatus is connected to a serial bus between a primary device and a secondary device, the serial bus includes a first bus and a second bus, and the apparatus includes a voltage divider m…
Who is the assignee on this patent?
Huawei Tech Co Ltd
What technology area does this patent fall under?
Primary CPC classification G01R31/58. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Jun 29 2021 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).