Metal-on-ceramic substrates

US11046051B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11046051-B2
Application numberUS-201615364821-A
CountryUS
Kind codeB2
Filing dateNov 30, 2016
Priority dateDec 1, 2015
Publication dateJun 29, 2021
Grant dateJun 29, 2021

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A metal-on-ceramic substrate comprises a ceramic layer, a first metal layer, and a bonding layer joining the ceramic layer to the first metal layer. The bonding layer includes thermoplastic polyimide adhesive that contains thermally conductive particles. This permits the substrate to withstand most common die attach operations, reduces residual stress in the substrate, and simplifies manufacturing processes.

First claim

Opening claim text (preview).

The invention claimed is: 1. A circuit substrate comprising: a ceramic layer; a first metal layer; and a bonding layer joining the first metal layer to the ceramic layer, the bonding layer comprising an adhesive which is thermally conductive; and a second metal layer on a side of the ceramic layer opposite the first metal layer; wherein the adhesive of the bonding layer consists of (i) a thermoplastic polyimide, and (ii) thermally conductive particles; and wherein the thermally conductive particles are selected from the group consisting of silver, copper, gold, diamond, and Si 3 N 4 . 2. The circuit substrate of claim 1 , wherein the bonding layer comprises a foil layer and two adhesive layers on opposite sides of the foil layer. 3. The circuit substrate of claim 1 , wherein the thermally conductive particles are selected from the group consisting of silver, copper, and gold. 4. The circuit substrate of claim 1 , wherein the first metal layer is a metal selected from the group consisting of copper, covetic copper, copper-beryllium, aluminum, aluminum silicon carbide (AlSiC), silver, palladium, platinum, nickel, gold, stainless steel, nickel-cobalt ferrous alloy, and alloys thereof. 5. The circuit substrate of claim 4 , wherein the first metal layer includes a set of sublayers. 6. The circuit substrate of claim 1 , wherein the first metal layer has a thickness of from about 1 mil to about 30 mils. 7. The circuit substrate of claim 1 , wherein the ceramic layer is made of a ceramic selected from the group consisting of aluminum nitride, alumina, BeO, zirconia toughened alumina (ZTA), SiC, and Si 3 N 4 . 8. The circuit substrate of claim 1 , wherein the ceramic layer has a thickness of about 20 mils to about 60 mils. 9. The circuit substrate of claim 1 , wherein the thermally conductive particles are round or flake. 10. A circuit substrate comprising: a ceramic layer; a first metal layer; and a bonding layer joining the first metal layer to the ceramic layer, the bonding layer comprising an adhesive which is thermally conductive; and a second metal layer on a side of the ceramic layer opposite the first metal layer; wherein the adhesive of the bonding layer consists of (i) a thermoplastic polyimide, and (ii) thermally conductive particles, and wherein the bonding layer is cured at a temperature from 210° C. to 290° C. 11. The circuit substrate of claim 10 , wherein the bonding layer is thermally stable up to 350° C. in air. 12. The circuit substrate of claim 10 , wherein the bonding layer is cured at a pressure from 65 kPa to 75 kPa, and wherein the bonding layer is cured in air, dry nitrogen, or vacuum. 13. The circuit substrate of claim 10 , wherein the thermally conductive particles are selected from the group consisting of silver, copper, gold, graphene, carbon nanotubes, diamond, boron nitride (BN), aluminum nitride (AlN), and silicon nitride (Si 3 N 4 ). 14. The circuit substrate of claim 10 , wherein the thermally conductive particles are selected from the group consisting of silver, copper, gold, diamond, and Si 3 N 4 . 15. The circuit substrate of claim 10 , wherein the first metal layer is a metal selected from the group consisting of copper, covetic copper, copper-beryllium, aluminum, aluminum silicon carbide (AlSiC), silver, palladium, platinum, nickel, gold, stainless steel, nickel-cobalt ferrous alloy, and alloys thereof. 16. The circuit substrate of claim 10 , wherein the ceramic layer is made of a ceramic selected from the group consisting of aluminum nitride, alumina, BeO, zirconia toughened alumina (ZTA), SiC, and Si 3 N 4 . 17. The circuit substrate of claim 10 , wherein the bonding layer comprises a foil layer and two adhesive layers on opposite sides of the foil layer. 18. The circuit substrate of claim 17 , wherein the foil layer is silver and the first metal layer is a metal selected from the group consisting of copper, covetic copper, copper-beryllium, aluminum, aluminum silicon carbide (AlSiC), palladium, platinum, nickel, gold, stainless steel, nickel-cobalt ferrous alloy, and alloys thereof. 19. The circuit substrate of claim 10 , wherein the bonding layer has a thickness of from about 2 μm to about 150 μm. 20. The circuit substrate of claim 19 , wherein the bonding layer has a thickness of from about 8 μm to about 125 μm.

Assignees

Inventors

Classifications

  • of conductive package substrates serving as an interconnection, e.g. of metal plates (manufacture or treatment of leadframes H10W70/04) · CPC title

  • having a laminate or multilayered structure, e.g. direct bond copper [DBC] ceramic substrates · CPC title

  • at least one layer being of nickel or chromium · CPC title

  • consisting of glass or ceramic material · CPC title

  • based on iron group metals, e.g. steel · CPC title

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What does patent US11046051B2 cover?
A metal-on-ceramic substrate comprises a ceramic layer, a first metal layer, and a bonding layer joining the ceramic layer to the first metal layer. The bonding layer includes thermoplastic polyimide adhesive that contains thermally conductive particles. This permits the substrate to withstand most common die attach operations, reduces residual stress in the substrate, and simplifies manufactur…
Who is the assignee on this patent?
Materion Corp
What technology area does this patent fall under?
Primary CPC classification B32B7/12. Mapped technology areas include Operations & Transport.
When was this patent published?
Publication date Tue Jun 29 2021 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).