Methods for processing semiconductor wafers having a polycrystalline finish

Patent metadata

Field	Value
Publication number	US-11043395-B2
Application number	US-201615764272-A
Country	US
Kind code	B2
Filing date	Sep 29, 2016
Priority date	Sep 30, 2015
Publication date	Jun 22, 2021
Grant date	Jun 22, 2021

Abstract

A method of processing a semiconductor wafer includes depositing a silicon layer on the semiconductor wafer. A first slurry is applied to the semiconductor wafer and the silicon layer is polished to smooth the silicon layer. A second slurry is applied to the semiconductor wafer. The second slurry includes a greater amount of a caustic agent than the first slurry.

First claim

What is claimed is:

1. A method of processing a semiconductor wafer comprising:
depositing a silicon layer on the semiconductor wafer;
applying a first slurry to the semiconductor wafer, the first slurry having a pH less than 10 and being free of caustic agent;
polishing the silicon layer to smooth the silicon layer; and
applying a second slurry to the semiconductor wafer, the second slurry comprising caustic agent, the second slurry having a pH between 10 and 12.

2. The method of claim 1 wherein the silicon layer is a polycrystalline silicon layer, the layer having a reduced roughness after polishing and the polycrystalline grain boundary being reduced by polishing.

3. The method of claim 1 wherein the silicon layer is polished using the first slurry for a predetermined time, the predetermined time being in the range between about 1 minute and about 5 minutes.

4. The method of claim 1 wherein predetermined time is approximately 2 minutes.

5. The method of claim 1 wherein the silicon layer is polished using the second slurry for a predetermined time, the predetermined time being in the range between about 5 minutes and about 15 minutes.

6. The method of claim 1 wherein the caustic agent is potassium hydroxide.

7. The method of claim 1 further comprising cleaning the semiconductor wafer to facilitate growth on the silicon layer prior to polishing the silicon layer.

8. The method of claim 7 further comprising forming a silicon oxide layer on the silicon layer prior to polishing the silicon layer.

9. The method of claim 8 wherein cleaning the semiconductor wafer comprises cleaning the semiconductor wafer using a standard clean 1 (SC1).

10. The method as set forth in claim 1 wherein the semiconductor wafer is positioned on a polishing pad while applying the first slurry to the semiconductor wafer, the semiconductor wafer and polishing pad both rotating while applying the first slurry to the semiconductor wafer.

11. The method as set forth in claim 10 wherein the semiconductor wafer is positioned on a polishing pad while applying the second slurry to the semiconductor wafer, the semiconductor wafer and polishing pad both rotating while applying the second slurry to the semiconductor wafer.

12. The method as set forth in claim 11 wherein the polishing pad that rotates while applying the first slurry is different that the polishing pad that rotates while applying the second slurry.

Assignees

• Sunedison Semiconductor Ltd Uen201334164H
• Globalwafers Co Ltd

Inventors

• Grabbe Alexis
• Wang Hui
• Chu Alex

Classifications

• H10P70/277

  the processing being a planarisation of conductive layers · CPC title

• H10P14/3456

  Polycrystalline · CPC title

• H10P14/3411

  Silicon, silicon germanium or germanium · CPC title

• H10P52/403 Primary

  of conductive or resistive materials · CPC title

• C09G1/02

  containing abrasives or grinding agents {(abrasives as such C09K3/14; polishing of semi-conductors H10P52/40)} · CPC title