Information processing apparatus, control method, information processing system, and non-transitory computer-readable storage medium with executable control program stored thereon

Patent metadata

Field	Value
Publication number	US-11039389-B2
Application number	US-201916366056-A
Country	US
Kind code	B2
Filing date	Mar 27, 2019
Priority date	Apr 4, 2018
Publication date	Jun 15, 2021
Grant date	Jun 15, 2021

Abstract

An information processing apparatus includes a receiver, a memory, an information processing unit which performs information processing and makes mode transition at least between a first mode and a second mode lower, a mode management module which has the information processing unit make mode transition from the second mode to the first mode when at least any one of the number of packets stored in the memory, a data amount of a packet stored in the memory, and a content of a packet stored in the memory satisfies a first condition, and a reading module which reads the packet stored in the memory when the information processing unit makes mode transition from the second mode to the first mode. The information processing unit makes mode transition from the first mode to the second mode when it has performed processing including reading of the packet by the reading module.

First claim

What is claimed is:

1. An information processing apparatus comprising:
a receiver configured to receive a plurality of packets from another apparatus through radio communication, the receiver operatively connected to a memory;
the memory being configured to store the plurality of packets received by the receiver, wherein storing the plurality of packets in the memory is conditioned on identification information for determining non-identical ones of the plurality of packets;
an information processor operatively connected to the memory and configured to: (a) perform information processing of the plurality of packets, and (b) transition at least between a first mode and a second mode lower in power consumption than the first mode; and
a mode management circuit connected to the information processor, the mode management circuit being configured to signal or control the information processor to transition from the second mode to the first mode when the number of the plurality of packets stored in the memory exceeds a prescribed number N,
the information processor being further configured to perform processing including reading at least one packet stored in the memory after transitioning from the second mode to the first mode,
the information processor transitioning from the first mode to the second mode after the information processor has performed processing including reading the at least one packet stored in the memory.

2. The information processing apparatus according to claim 1 , wherein the mode management circuit is further configured to test whether a data amount of the received plurality of packets exceeds a prescribed data amount.

3. The information processing apparatus according to claim 1 , wherein the memory is configured to store received packets which satisfy a non-redundant condition among the plurality of packets received by the receiver.

4. The information processing apparatus according to claim 3 , wherein the non-redundant condition includes a condition that the plurality of packets received by the receiver conform to a prescribed format.

5. The information processing apparatus according to claim 3 , wherein the non-redundant condition is at least partly determined based on identification information of packets received in advance by the receiver.

6. The information processing apparatus according to claim 5 , wherein the identification information is at least one of a value representing data constituting the packets received by the receiver and at least a part of data constituting the packets received by the receiver.

7. The information processing apparatus according to claim 6 , wherein the value representing the data constituting each packet received by the receiver comprises a hash value calculated from the data constituting the packet.

8. The information processing apparatus according to claim 7 , wherein the hash value is added by a sender of each packet.

9. The information processing apparatus according to claim 3 , wherein the non-redundant condition is at least partly determined based on a packet which is stored in the memory but has not yet been read into the information processor.

10. The information processing apparatus according to claim 1 , wherein while the information processor operates in the second mode, reception by the receiver and storage in the memory are repeatedly performed.

11. The information processing apparatus according to claim 1 , wherein the information processor is further configured to erase, after the information processor reads packets stored in the memory, those read packets from the memory.

12. The information processing apparatus according to claim 1 , wherein the receiver is configured to receive the packets without establishing connection to the another apparatus.

13. The information processing apparatus according to claim 1 , wherein the receiver is configured to provide time stamp information to the received packets.

14. The information processing apparatus according to claim 1 , wherein the packets include data on a game application.

15. The information processing apparatus according to claim 1 , wherein
the information processing apparatus further comprises a radio processor which includes at least the receiver and is separated from the information processor and can operate independently of the information processor, and
the information processor is higher in power consumption than the radio processor.

16. The information processing apparatus according to claim 15 , wherein the information processor is configured to sense a signal from the radio processor indicating mode transition.

17. The information processing apparatus according to claim 1 , wherein the mode management circuit is configured to have the information processor make mode transition from the second mode to the first mode without depending on a data amount of the plurality of packets stored in the memory, in response to the plurality of packets received by the receiver including instructions to make mode transition to the second mode.

18. A control method in an information processing apparatus, the information processing apparatus including a receiver configured to receive a plurality of packets from another apparatus through radio communication, a memory configured to store the plurality of packets received by the receiver, and an information processor configured to perform information processing and to make mode transition at least between a first mode and a second mode lower in power consumption than the first mode, the control method comprising:
receiving a plurality of packets;
storing the received plurality of packets in the memory, wherein the storing of the received plurality of packets in the memory is conditioned on identification information for determining non-identical ones of the plurality of packets,
having the information processor make mode transition from the second mode to the first mode when the number of the plurality packets stored in the memory exceeds a predetermined number N;
performing processing including reading of the plurality of packets stored in the memory after transition from the second mode to the first mode is made; and
the information processor making mode transition from the first mode to the second mode after the information processor has performed the processing.

19. An information processing system including a first information processing apparatus and a second information processing apparatus,
the first information processing apparatus including
a receiver configured to receive a plurality of packets from the second information processing apparatus through radio communication,
a memory configured to store the plurality of packets received by the receiver, wherein the storing of the received plurality of packets in the memory is conditioned on identification information for determining non-identical ones of the plurality of packets,
an information processor configured to perform information processing and to make mode transition at least between a first mode and a second mode lower in power consumption than the first mode,
a mode management circuit configured to have the information processor make mode transition from the second mode to the first mode when the number of the plurality of packets stored in the memory exceeds a predetermined number N, and
a reading circuit configured to read the plurality of packets stored in the memory after the information processor makes mode transition from the second mode to the first mode,

the information processor making mod

Assignees

• Nintendo Co Ltd

Inventors

• Kurose Sho
• Shoji Masahiro
• Shibata Takayuki
• Yan Weiwei
• Takeuchi Hiroyuki
• Kondo Yoshihisa
• Matsuoka Masayoshi
• Imura Yoshitaka

Classifications

• H04W52/0235

  where the received signal is a power saving command · CPC title

• H04W52/0229 Primary

  where the received signal is a wanted signal · CPC title

• H04W52/028

  switching on or off only a part of the equipment circuit blocks · CPC title

• H04W40/04

  based on wireless node resources · CPC title

• Y02D30/70

  in wireless communication networks · CPC title