Gate resistance adjustment device

US11038500B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11038500-B2
Application numberUS-201916564580-A
CountryUS
Kind codeB2
Filing dateSep 9, 2019
Priority dateJan 4, 2019
Publication dateJun 15, 2021
Grant dateJun 15, 2021

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A gate resistance adjustment device has a waveform input unit that inputs waveforms of a drain voltage or a collector voltage and a drain current or a collector current at least one of during a switching device is turned on and during the switching device is turned off, an extraction unit that extracts time required for at least one of turning on or off the switching device and a steady-state drain current or a steady-state collector current of the switching device based on the waveforms input by the waveform input unit, a calculator that calculates a gate resistance of the switching device based on the time and the steady-state drain current or the steady-state collector current that are extracted by the extraction unit, and a setting unit that sets a gate resistance calculated by the calculator in the switching device.

First claim

Opening claim text (preview).

The invention claimed is: 1. A gate resistance adjustment device comprising: a waveform input unit that inputs graphical waveforms that are an imitation of a drain voltage or a collector voltage and a drain current or a collector current at least one of during a switching device being turned on and during the switching device being turned off; an extraction unit that extracts a time required for at least one of turning on or off the switching device and a steady-state drain current or a steady-state collector current of the switching device based on the waveforms input by the waveform input unit; a calculator that calculates a gate resistance of the switching device based on the time and the steady-state drain current or the steady-state collector current that are extracted by the extraction unit; and a setting unit that sets a gate resistance calculated by the calculator in the switching device. 2. The gate resistance adjustment device according to claim 1 , wherein the extraction unit extracts at least one of a direct bias voltage and a steady-state gate voltage of the switching device in addition to time required for at least one of turning on or off the switching device and a steady-state drain current or a steady-state collector current of the switching device based on the waveforms, and the calculator calculates a gate resistance of the switching device based on at least one of the direct bias voltage and the steady-state gate voltage of the switching device in addition to the time and the steady-state drain current or the steady-state collector current that are extracted by the extraction unit. 3. The gate resistance adjustment device according to claim 1 , further comprising a storage unit that stores a gate resistance calculated by the calculator, wherein the setting unit reads the gate resistance stored in the storage unit and sets the gate resistance in the switching device. 4. The gate resistance adjustment device according to claim 1 , wherein the calculator calculates a gate resistance of the switching device based on information about electrical characteristics of the switching device in addition to the time and the steady-state drain current or the steady-state collector current that are extracted by the extraction unit. 5. The gate resistance adjustment device according to claim 4 , wherein the information about electrical characteristics includes a threshold voltage, a transconductance, gate-source capacitance, and gate-drain capacitance of the switching device. 6. The gate resistance adjustment device according to claim 1 , wherein the calculator calculates the gate resistance during the switching device is turned on and the gate resistance during the switching device is turned off based on different model equations. 7. The gate resistance adjustment device according to claim 6 , wherein the calculator calculates each of the model equations based on an equivalent circuit of the switching device. 8. The gate resistance adjustment device according to claim 6 , wherein the calculator calculates the model equations fitting experimental waveforms during the switching device is turned on and during the switching device is turned off. 9. The gate resistance adjustment device according to claim 6 , wherein the calculator calculates the gate resistance using a first model equation based on a time change of the drain current or the collector current in a first time period during which the switching device is turned on, and calculates the gate resistance using a second model equation based on a time change of the drain voltage or the collector voltage in a second time period following the first time period during which the switching device is turned on, and the setting unit sets a gate resistance of the switching device so as to be switched between the first time period and the second time period during which the switching device is turned on, based on the gate resistance calculated by the calculator. 10. The gate resistance adjustment device according to claim 6 , wherein the calculator calculates the gate resistance using a third model equation based on a time change of the drain current or the collector current in a third time period during which the switching device is turned off, and calculates the gate resistance using a fourth model equation based on a time change of the drain voltage or the collector voltage in a fourth time period following the third time period during which the switching device is turned off, and the setting unit sets a gate resistance of the switching device so as to be switched between the third time period and the fourth time period during which the switching device is turned off, based on the gate resistance calculated by the calculator.

Assignees

Inventors

Classifications

  • Measuring means of, e.g. currents through or voltages across the switch · CPC title

  • for testing field effect transistors, i.e. FET's · CPC title

  • in field-effect transistor switches · CPC title

  • in composite switches · CPC title

  • the devices being field-effect transistors · CPC title

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Frequently asked questions

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What does patent US11038500B2 cover?
A gate resistance adjustment device has a waveform input unit that inputs waveforms of a drain voltage or a collector voltage and a drain current or a collector current at least one of during a switching device is turned on and during the switching device is turned off, an extraction unit that extracts time required for at least one of turning on or off the switching device and a steady-state d…
Who is the assignee on this patent?
Toshiba Kk
What technology area does this patent fall under?
Primary CPC classification H03K17/0828. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jun 15 2021 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 4 related publications on this page (citations in our corpus or others sharing the same primary CPC).