Semiconductor device

Patent metadata

Field	Value
Publication number	US-11038141-B2
Application number	US-202016838465-A
Country	US
Kind code	B2
Filing date	Apr 2, 2020
Priority date	Jan 16, 2015
Publication date	Jun 15, 2021
Grant date	Jun 15, 2021

Abstract

A display device is provided including a display region arranged with a plurality of pixels, and a first sealing region arranged in an exterior periphery part of the display region, the display region includes an individual pixel electrode arranged in each of the plurality of pixels, a common pixel electrode arranged in upper layer of the individual pixel electrode and in succession to the plurality of pixels, and a light emitting layer arranged between the individual pixel electrode and the common pixel electrode, and the first sealing region includes a sealing layer arranged on a lower layer than the common pixel electrode and a region stacked with the common pixel electrode extending from the display region, the stacked region being enclosed by the display region.

First claim

What is claimed is:

1. A semiconductor device comprising:
a first substrate;
a TFT layer arranged on the first substrate, the TFT layer including thin film transistors and an inorganic insulation film;
a first organic insulation layer on the TFT layer;
a first electrode layer arranged on the first organic insulation layer, the first electrode layer including first electrodes and a first conductive film;
a second organic insulation layer arranged on the first electrode layer, the second organic insulation layer having openings which expose upper surfaces of the first electrodes,
a second electrode layer arranged on the second organic insulation layer, the second electrode layer including a transparent conductive material; and
a sealing layer on the second electrode layer, wherein
the first electrodes are arranged in a matrix form,
a first recess surrounding the first electrodes is formed in the first organic insulation layer and the second organic insulation layer,
a second recess surrounding the first electrodes is formed in the second organic insulation layer,
a third recess between the first electrodes and the first recess is formed in the second organic insulation layer,
the first conductive film is exposed from the second organic insulation layer in the second recess and the third recess, and
the second electrode layer is in contact with the first conductive film through the second recess or the third recess.

2. The semiconductor device according to claim 1 , wherein
the first recess surrounds the first electrodes continuously.

3. The semiconductor device according to claim 1 , wherein
the second recess has a plurality of parts, and
one of the plurality of parts of the second recess and another one of the plurality of parts of the second recess are spaced apart from each other.

4. The semiconductor device according to claim 1 , further comprising a second substrate and a seal material between the first substrate and the second substrate, the seal material being in contact with both of the first substrate and the second substrate, wherein
the seal material surrounds the first electrodes,
the seal material and the first organic insulation layer do not overlap each other in a planar view, and
the seal material and the second organic insulation layer do not overlap each other in the planar view.

5. The semiconductor device according to claim 1 , further comprising a light emitting part between one of the first electrodes and the second electrode.

6. The semiconductor device according to claim 5 , wherein
the light emitting part includes an organic light emitting layer.

Assignees

• Japan Display Inc

Inventors

• Hanari Jun

Classifications

• H10K59/8722 Primary

  Peripheral sealing arrangements, e.g. adhesives, sealants · CPC title

• H10K59/871

  Self-supporting sealing arrangements · CPC title

• H10K59/8052

  Cathodes · CPC title

• H10K59/8051

  Anodes · CPC title

• H10K50/8423

  Metallic sealing arrangements · CPC title