Multilayer ceramic capacitor having dummy pattern

Patent metadata

Field	Value
Publication number	US-11037733-B2
Application number	US-201916561372-A
Country	US
Kind code	B2
Filing date	Sep 5, 2019
Priority date	Oct 11, 2018
Publication date	Jun 15, 2021
Grant date	Jun 15, 2021

Abstract

A multilayer ceramic capacitor includes a ceramic body including a plurality of dielectric layers stacked therein in a stacking direction; first and second external electrodes disposed externally on the ceramic body; first and second internal electrodes alternately stacked with the plurality of dielectric layers, forming an internal active layer of the ceramic body, and respectively connected to the first and second external electrodes; a dummy layer, including a conductive material and having a mesh shape, disposed in at least one of an upper cover layer or a lower cover layer respectively disposed above or below the internal active layer of the ceramic body in the stacking direction.

First claim

What is claimed is:

1. A multilayer ceramic capacitor, comprising:
a ceramic body comprising a plurality of dielectric layers stacked therein in a stacking direction;
first and second external electrodes disposed externally on the ceramic body;
first and second internal electrodes alternately stacked with the plurality of dielectric layers, forming an internal active layer of the ceramic body, and respectively connected to the first and second external electrodes; and
a dummy layer, including a conductive material and having a mesh shape, disposed in at least one of an upper cover layer or a lower cover layer respectively disposed above or below the internal active layer of the ceramic body in the stacking direction,
wherein the mesh shape of the dummy layer includes repetitive patterns that intersect with one another, and
wherein the dummy layer is spaced apart from the first and second external electrodes.

2. The multilayer ceramic capacitor of claim 1 , wherein the dummy layer comprises:
an upper dummy layer, including a conductive material and having the mesh shape, disposed in the upper cover layer disposed above the internal active layer of the ceramic body; and
a lower dummy layer, including a conductive material and having the mesh shape, disposed in the lower cover layer disposed below the internal active layer of the ceramic body.

3. The multilayer ceramic capacitor of claim 2 ,
wherein the upper dummy layer comprises at least one upper dummy pattern layer,
wherein the lower dummy layer comprises at least one lower dummy pattern layer, and
wherein the at least one upper dummy pattern layer and the at least one lower dummy pattern layer each include mesh patterns having different shapes from each other.

4. The multilayer ceramic capacitor of claim 2 ,
wherein the upper dummy layer comprises a plurality of upper dummy pattern layers alternately stacked with the plurality of dielectric layers, and
wherein at least one of the plurality of upper dummy pattern layers includes a mesh pattern having a shape different from shapes of mesh patterns of remaining layers of the plurality of upper dummy pattern layers.

5. The multilayer ceramic capacitor of claim 2 ,
wherein the upper dummy layer comprises a plurality of upper dummy pattern layers alternately stacked with the plurality of dielectric layers, and
wherein the plurality of upper dummy pattern layers have mesh patterns having different shapes from one another.

6. The multilayer ceramic capacitor of claim 2 ,
wherein the upper dummy layer comprises a plurality of upper dummy pattern layers alternately stacked with the plurality of dielectric layers, and
wherein thicknesses of the plurality of upper dummy pattern layers decrease from an internal region to an external region of the ceramic body in a stacking direction of the plurality of upper dummy pattern layers.

7. The multilayer ceramic capacitor of claim 2 ,
wherein the lower dummy layer comprises a plurality of lower dummy pattern layers alternately stacked with the plurality of dielectric layers, and
wherein at least one of the plurality of lower dummy pattern layers includes a mesh pattern having a shape different from shapes of mesh patterns of remaining layers of the plurality of lower dummy pattern layers.

8. The multilayer ceramic capacitor of claim 2 ,
wherein the lower dummy layer comprises a plurality of lower dummy pattern layers alternately stacked with the plurality of dielectric layers, and
wherein the plurality of lower dummy pattern layers have mesh patterns having different shapes from one another.

9. The multilayer ceramic capacitor of claim 2 ,
wherein the lower dummy layer comprises a plurality of lower dummy pattern layers alternately stacked with the plurality of dielectric layers, and
wherein thicknesses of the plurality of upper dummy pattern layers decrease from an internal region to an external region of the ceramic body in a stacking direction of the plurality of lower dummy pattern layers.

10. The multilayer ceramic capacitor of claim 1 ,
wherein the mesh shape includes any one of a diamond-shaped mesh pattern, a triangular mesh pattern, a square mesh pattern, or a hexagonal mesh pattern.

11. The multilayer ceramic capacitor of claim 1 ,
wherein the dummy layer is not connected to the first and second internal electrodes.

12. A multilayer ceramic capacitor, comprising:
a ceramic body comprising a plurality of dielectric layers stacked therein in a stacking direction;
a first external electrode disposed on a first external surface of the ceramic body;
a second external electrode disposed on a second external surface different from the first external surface of the ceramic body;
one or more first internal electrodes alternately stacked with the plurality of dielectric layers in an internal active layer of the ceramic body, exposed to the first external surface of the ceramic body, and connected to the first external electrode;
one or more second internal electrodes alternately stacked with the plurality of dielectric layers and the one or more first internal electrodes in the internal active layer of the ceramic body, exposed to the second external surface of the ceramic body, and connected to the second external electrode;
an upper dummy layer, including a conductive material and having a mesh shape, disposed in an upper cover layer disposed above the internal active layer of the ceramic body in the stacking direction; and
a lower dummy layer, including a conductive material and having the mesh shape, disposed in a lower cover layer disposed below the internal active layer of the ceramic body in the stacking direction,
wherein the mesh shape of the upper or lower dummy layer includes repetitive patterns that intersect with one another, and
wherein at least one of the upper dummy layer or the lower dummy layer is spaced apart from the first and second external electrodes.

13. The multilayer ceramic capacitor of claim 12 ,
wherein the upper dummy layer comprises at least one upper dummy pattern layer,
wherein the lower dummy layer comprises at least one lower dummy pattern layer, and
wherein the at least one upper dummy pattern layer and the at least one lower dummy pattern layer comprise mesh patterns having different shapes from each other.

14. The multilayer ceramic capacitor of claim 12 ,
wherein the upper dummy layer comprises a plurality of upper dummy pattern layers alternately stacked with the plurality of dielectric layers, and
wherein at least one of the plurality of upper dummy pattern layers includes a mesh pattern having a shape different from shapes of mesh patterns of remaining layers of the plurality of upper dummy pattern layers.

15. The multilayer ceramic capacitor of claim 12 ,
wherein the upper dummy layer comprises a plurality of upper dummy pattern layers alternately stacked with the plurality of dielectric layers, and
wherein the plurality of upper dummy pattern layers have mesh patterns having different shapes from one another.

16. The multilayer ceramic capacitor of claim 12 ,
wherein the upper dummy layer comprises a plurality of upper dummy pattern layers alternately stacked with the plurality of dielectric layers, and
wherein thicknesses of the plurality of upper dummy pattern layers decrease from an internal region to an external region of the ceramic body in a stacking direction of the plurality of upper dummy pattern layers.

17. The multilayer ceramic capacitor of claim 12 ,
wherein the lower dummy layer comprises a plurality of lower dummy

Assignees

• Samsung Electro Mech

Inventors

• Jun Ho In
• Lee Sun Cheol
• Kim Kyeong Jun

Classifications

• H01G4/224

  Housing; Encapsulation · CPC title

• H01G4/012 Primary

  Form of non-self-supporting electrodes · CPC title

• H01G4/005

  Electrodes · CPC title

• H01G4/12 Primary

  Ceramic dielectrics {(H01G4/085 takes precedence)} · CPC title

• H01G4/232

  electrically connecting two or more layers of a stacked or rolled capacitor · CPC title