Display apparatus and method of driving the same

US11037498B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11037498-B2
Application numberUS-202016880655-A
CountryUS
Kind codeB2
Filing dateMay 21, 2020
Priority dateJun 18, 2019
Publication dateJun 15, 2021
Grant dateJun 15, 2021

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

A display apparatus includes a display panel, a power voltage generator, a gate driver and a data driver. The display panel includes first and second display areas, a first back gate signal applying line connected to at least one back gate electrode of at least one of a plurality of pixels in the first display area and a second back gate signal applying line connected to at least one back gate electrode of at least one of a plurality of pixels in the second display area. The power voltage generator is configured to output a first back gate signal to the first back gate signal applying line and a second back gate signal to the second back gate signal applying line. The gate driver is configured to output a gate signal to the display panel. The data driver is configured to output a data voltage to the display panel.

First claim

Opening claim text (preview).

What is claimed is: 1. A display apparatus, comprising: a display panel comprising a first display area, a second display area, a first back gate signal applying line connected to at least one back gate electrode of at least one of a plurality of pixels in the first display area, and a second back gate signal applying line connected to at least one back gate electrode of at least one of a plurality of pixels in the second display area; a power voltage generator configured to output a first back gate signal to the first back gate signal applying line and a second back gate signal to the second back gate signal applying line; a gate driver configured to output a gate signal to the display panel; and a data driver configured to output a data voltage to the display panel, wherein the first display area is configured to display an image and the second display area is configured not to display an image in a partial driving mode, and wherein the first back gate signal is different from the second back gate signal in the partial driving mode. 2. The display apparatus of claim 1 , wherein the first display area and the second display area are configured to display an image in a normal driving mode, and wherein the first back gate signal is substantially the same as the second back gate signal in the normal driving mode. 3. The display apparatus of claim 1 , wherein the second back gate signal is greater than the first back gate signal in the partial driving mode. 4. The display apparatus of claim 1 , wherein at least one of the pixels of the display panel comprises: a first pixel switching element comprising a control electrode connected to a first node, an input electrode connected to a second node and an output electrode connected to a third node; a second pixel switching element comprising a control electrode configured to receive a data write gate signal, an input electrode configured to receive the data voltage and an output electrode connected to the second node; a third pixel switching element comprising a control electrode configured to receive the data write gate signal, an input electrode connected to the first node and an output electrode connected to the third node; a fourth pixel switching element comprising a control electrode configured to receive a data initialization gate signal, an input electrode configured to receive an initialization voltage and an output electrode connected to the first node; a fifth pixel switching element comprising a control electrode configured to receive an emission signal, an input electrode configured to receive a high power voltage and an output electrode connected to the second node; a sixth pixel switching element comprising a control electrode configured to receive the emission signal, an input electrode connected to the third node and an output electrode connected to an anode electrode of an organic light emitting element; a seventh pixel switching element comprising a control electrode configured to receive an organic light emitting element initialization gate signal, an input electrode configured to receive the initialization voltage and an output electrode connected to the anode electrode of the organic light emitting element; a storage capacitor comprising a first electrode configured to receive the high power voltage and a second electrode connected to the first node; and the organic light emitting element comprising the anode electrode and a cathode electrode configured to receive a low power voltage. 5. The display apparatus of claim 4 , wherein the first pixel switching element further comprises a back gate electrode configured to receive the first back gate signal or the second back gate signal. 6. The display apparatus of claim 4 , wherein the sixth pixel switching element further comprises a back gate electrode configured to receive the first back gate signal or the second back gate signal. 7. The display apparatus of claim 4 , wherein the first pixel switching element further comprises a first back gate electrode configured to receive the first back gate signal or the second back gate signal, and wherein the sixth pixel switching element further comprises a second back gate electrode configured to receive the first back gate signal or the second back gate signal. 8. The display apparatus of claim 1 , wherein at least one of the pixels of the display panel comprises: a first pixel switching element comprising a control electrode connected to a first node, an input electrode configured to receive a high power voltage and an output electrode connected to an anode electrode of an organic light emitting element; a second pixel switching element comprising a control electrode configured to receive the gate signal, an input electrode configured to receive the data voltage and an output electrode connected to the first node; a storage capacitor comprising a first electrode configured to receive the high power voltage and a second electrode connected to the first node; and the organic light emitting element comprising the anode electrode and a cathode electrode configured to receive a low power voltage. 9. The display apparatus of claim 8 , wherein the first pixel switching element further comprises a first back gate electrode configured to receive the first back gate signal or the second back gate signal. 10. The display apparatus of claim 9 , wherein the second pixel switching element further comprises a second back gate electrode configured to receive the first back gate signal or the second back gate signal. 11. A display apparatus, comprising: a display panel comprising a first display area, a second display area, a first back gate signal applying line connected to at least one back gate electrode of at least one of a plurality of pixels in the first display area, and a second back gate signal applying line connected to at least one back gate electrode of at least one of a plurality of pixels in the second display area; a power voltage generator configured to output a first back gate signal to the first back gate signal applying line and a second back gate signal to the second back gate signal applying line; a gate driver configured to output a gate signal to the display panel; a data driver configured to output a data voltage to the display panel; and an emission driver configured to output an emission signal to the display panel, wherein the second back gate signal is configured to increase from a normal level to an inactive level greater than the normal level when the display panel is folded, and wherein at least one of the gate driver, the data driver and the emission driver is configured not to output a driving signal to the second display area when the display panel is folded. 12. The display apparatus of claim 11 , wherein a carry signal is not transmitted to a portion of the gate driver corresponding to the second display area so that the gate driver is configured not to output the gate signal to the second display area when the display panel is folded. 13. The display apparatus of claim 11 , wherein an output buffer of the data driver is configured to be deactivated when outputting the data voltage to the second display area so that the data driver is configured not to output the data voltage to the second display area when the display panel is folded. 14. The display apparatus of claim 11 , wherein the data driver is configured to output a black data voltage to the second display area when the display panel is folded. 15. The display apparatus of claim 11 , wherein the second back gate signal is configured to decrease from the

Assignees

Inventors

Classifications

  • G09G3/3291Primary

    in which the data driver supplies a variable data voltage for setting the current through, or the voltage across, the light-emitting elements · CPC title

  • with use of split matrices (G09G3/3644 and G09G3/3666 take precedence) · CPC title

  • used for counteracting undesired variations, e.g. feedback or autozeroing · CPC title

  • Changes in size, position or resolution of an image · CPC title

  • G09G3/3258Primary

    with pixel circuitry controlling the voltage across the light-emitting element · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US11037498B2 cover?
A display apparatus includes a display panel, a power voltage generator, a gate driver and a data driver. The display panel includes first and second display areas, a first back gate signal applying line connected to at least one back gate electrode of at least one of a plurality of pixels in the first display area and a second back gate signal applying line connected to at least one back gate …
Who is the assignee on this patent?
Samsung Display Co Ltd
What technology area does this patent fall under?
Primary CPC classification G09G3/3291. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Jun 15 2021 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).