Electronic device having USB Type-C interface, control method, and readable storage

US11036670B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11036670-B2
Application numberUS-201716759968-A
CountryUS
Kind codeB2
Filing dateOct 31, 2017
Priority dateOct 31, 2017
Publication dateJun 15, 2021
Grant dateJun 15, 2021

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A electronic device includes a USB Type-C interface, a switching circuit, a first signal path, and a second signal path. The USB Type-C interface is configured to connect to a USB Type-C device. The switching circuit is connected to the USB Type-C interface, the first signal path, and the second signal path. When the USB Type-C interface is connected to the USB Type-C device, the first signal path is connected to the USB Type-C interface through the switching circuit, and a level of a first pin of the USB Type-C interface is a first level. When the USB Type-C interface is disconnected from the USB Type-C device, the second signal path is connected to the USB Type-C interface through the switching circuit, and a level of the first pin is a second level. The first level is greater than the second level.

First claim

Opening claim text (preview).

What is claimed is: 1. A device, comprising: a USB Type-C interface configured to connect to a USB Type-C device; a switching circuit connected to the USB Type-C interface, a first signal path, and a second signal path; wherein when the USB Type-C interface is connected to the USB Type-C device, the first signal path is connected to the USB Type-C interface through the switching circuit, the second signal path is disconnected from the USB Type-C interface, and a level of a first pin of the USB Type-C interface is a first level; wherein when the USB Type-C interface is disconnected from the USB Type-C device, the second signal path is connected to the USB Type-C interface through the switching circuit, the first signal path is disconnected from the USB Type-C interface, and a level of the first pin of the USB Type-C interface is a second level; and wherein the first level is greater than the second level. 2. The device of claim 1 , wherein the first pin of the USB Type-C interface is a CC pin. 3. The device of claim 1 , wherein: the first signal path comprises a PD circuit; the second signal path comprises a power supply circuit, a detection circuit, and a first resistor; the power supply circuit is configured to output a first power, the power supply circuit is connected to a third pin of the switching circuit through the first resistor, and a level of the first power is less than a level of a signal output by the PD circuit; and the detection circuit is configured to detect a level of the third pin of the switching circuit, and when the level of the third pin meets a first preset condition, determine that the USB Type-C interface is connected to the USB Type-C device and send a first signal to the switching circuit, wherein the first signal instructs connecting the first signal path with the USB Type-C interface. 4. The device of claim 3 , wherein: the PD circuit is configured to detect a level of a second pin of the switching circuit; and in response to the level of the second pin meeting a second preset condition, determine that the USB Type-C interface is disconnected from the USB Type-C device and send a second signal to the switching circuit, wherein the second signal instructs connecting the second signal path with the USB Type-C interface. 5. The device of claim 3 , wherein: the device further comprises a controller, the controller is connected to the detection circuit and the switching circuit; the detection circuit is further configured to send a first signal to the controller when the level of the third pin of the switching circuit meets the first preset condition; and the controller instructs, according to the first signal, the switching circuit to connect the first signal path to the USB Type-C interface. 6. The device of claim 3 , wherein the device further comprises: a controller, the controller is connected to the detection circuit and the switching circuit; the detection circuit sends the level of the third pin of the switching circuit to the controller; and the controller instructs, according to the level of the third pin of the switching circuit, the switching circuit to connect the first signal path to the USB Type-C interface. 7. The device of claim 4 , wherein: the device further comprises a controller, the controller is connected to the PD circuit and the switching circuit; and the controller instructs, according to the second signal, the switching circuit to connect the second signal path to the USB Type-C interface. 8. The device of claim 3 , wherein the detection circuit is an analog-to-digital converter (ADC) detection circuit. 9. A method comprising: connecting a first signal path to a USB Type-C interface through a switching circuit when the USB Type-C interface is connected with a USB Type-C device, the switching circuit is connected to the USB Type-C interface, the first signal path, and a second signal path; disconnecting the second signal path from the USB Type-C interface when the USB Type-C interface is connected with the USB Type-C device, wherein a level of a first pin of the USB Type-C interface is a first level when the USB Type-C interface is connected with the USB Type-C device; connecting the second signal path to the USB Type-C interface through the switching circuit when the USB Type-C interface is disconnected with the USB Type-C device; and disconnecting the first signal path from the USB Type-C interface when the USB Type-C interface is disconnected with the USB Type-C device, wherein a level of the first pin of the USB Type-C interface is a second level when the USB Type-C interface disconnected with the USB Type-C device, wherein the first level is greater than the second level. 10. The method of claim 9 , wherein the first pin of the USB Type-C interface is a CC pin. 11. The method of claim 9 , wherein the first signal path comprises a PD circuit, and wherein the method further comprises: detecting, by the PD circuit, that a level of a second pin of the switching circuit meets a second preset condition; determining, by the PD circuit, that the USB Type-C interface is disconnected from the USB Type-C device; controlling the switching circuit to disconnect the first signal path from the USB Type-C interface; and controlling the switching circuit to connect the second signal path to the USB Type-C interface. 12. The method of claim 9 , wherein the second signal path comprises a power supply circuit, a detection circuit, and a first resistor, and wherein the method further comprises: detecting, by the detection circuit, that a level of a third pin of the switching circuit meets a first preset condition; determining, by the detection circuit, that the USB Type-C interface is connected to the USB Type-C device according to the level of the third pin of the switching circuit meeting the first preset condition; controlling the switching circuit to disconnect the second signal path from the USB Type-C interface, and controlling the switching circuit to connect the first signal path to the USB Type-C interface. 13. The method of claim 11 , wherein the device comprises a controller, and wherein the method further comprises: detecting, by the PD circuit, that the level of the second pin of the switching circuit meets the second preset condition; determining, by the PD circuit, that the USB Type-C interface is disconnected from the USB Type-C device according to the level of the second pin of the switching circuit meeting the second preset condition; controlling, by the controller, according to an instruction from the PD circuit, the switching circuit to disconnect the first signal path from the USB Type-C interface; and controlling, by the controller, according to an instruction from the PD circuit, the switching circuit to connect the second signal path to the USB Type-C interface. 14. The method of claim 12 , wherein the device comprises a controller, and wherein the method further comprises: detecting, by the detection circuit, that the level of the third pin of the switching circuit meets the first preset condition; determining, by the detection circuit, that the USB Type-C interface is connected to the USB Type-C device; controlling, by the controller, according to an instruction from the detection circuit, the switching circuit to disconnect the second signal path from the USB Type-C interface; and controlling, by the controller, according to an instruction from the detection circuit, the switching circuit to connect the first signal path to the USB Type-C interface. 15. A non-transitory computer-readable medium havin

Assignees

Inventors

Classifications

  • Supervision thereof, e.g. detecting power-supply failure by out of limits supervision · CPC title

  • Power supply means, e.g. regulation thereof (for memories G11C) · CPC title

  • on a serial bus, e.g. I2C bus, SPI bus (on daisy chain buses G06F13/4247) · CPC title

  • Universal serial bus [USB] · CPC title

  • G06F13/385Primary

    for adaptation of a particular data processing system to different peripheral devices · CPC title

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Frequently asked questions

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What does patent US11036670B2 cover?
A electronic device includes a USB Type-C interface, a switching circuit, a first signal path, and a second signal path. The USB Type-C interface is configured to connect to a USB Type-C device. The switching circuit is connected to the USB Type-C interface, the first signal path, and the second signal path. When the USB Type-C interface is connected to the USB Type-C device, the first signal p…
Who is the assignee on this patent?
Huawei Tech Co Ltd, Huawei Technolgies Co Ltd
What technology area does this patent fall under?
Primary CPC classification G06F13/4282. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Jun 15 2021 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 10 related publications on this page (citations in our corpus or others sharing the same primary CPC).