NOP sled defense

US11036654B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11036654-B2
Application numberUS-201816014442-A
CountryUS
Kind codeB2
Filing dateJun 21, 2018
Priority dateApr 14, 2018
Publication dateJun 15, 2021
Grant dateJun 15, 2021

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  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

The disclosed technology is generally directed to protection against unauthorized code. In one example of the technology, a read request to a restricted region of memory is detected. The read request is associated with a first processor. In response to detecting the read request to the restricted region of memory, a data value that causes an exception in response to execution by the first processor is provided.

First claim

Opening claim text (preview).

We claim: 1. An apparatus, comprising: a device that is adapted to perform actions, including: detecting a read request to a restricted region of memory, wherein the read request is associated with a first processor; in response to detecting the read request to the restricted region of memory, providing, as data read by the read request in lieu of reading data in the restricted region of memory, a data value; receiving an instruction to execute the data value; and via the first processor, executing the data value responsive to the instruction to execute the data value, the execution of the data value causing an exception. 2. The apparatus of claim 1 , the actions further including, in response to detecting the read request to an unmapped region of memory, providing a data value that causes an exception in response to execution by the first processor. 3. The apparatus of claim 1 , wherein the device further includes a firewall, and wherein the restricted region of memory is restricted by the firewall. 4. The apparatus of claim 1 , the actions further including: detecting a read request to a restricted region of memory, wherein the read request is associated with the first processor; and in response to detecting the read request to the restricted region of memory, providing a data value that causes an infinite loop or a data value that causes a branch to logging detection of the read request. 5. The apparatus of claim 1 , the actions further including determining the data value that causes an exception in response to execution by the first processor based on a look-up table and an indication of the first processor as an input to the look-up table. 6. The apparatus of claim 1 , wherein the read request is associated with the first processor via a master identifier (ID) that is associated with the read request. 7. The apparatus of claim 1 , wherein the device further includes a second processor, and wherein the data value also causes an exception in response to execution by the second processor. 8. An apparatus, comprising: a device that is adapted to perform actions, including: detecting a read request to a restricted region of memory, wherein the read request is associated with a first processor; in response to detecting the read request to the restricted region of memory, providing, as data read by the read request in lieu of reading data in the restricted region of memory, a data value; receiving an instruction to execute the data value; and via the first processor, executing the data value responsive to the instruction to execute the data value, the execution of the data value causing at least one of an infinite loop or a branch to logging detection of the read request. 9. The apparatus of claim 8 , the actions further including, in response to detecting a read request to an unmapped region of memory, providing a data value that causes an infinite loop or a data value that causes a branch to logging detection of the read request in response to execution by the first processor. 10. The apparatus of claim 8 , wherein the device further includes a firewall, and wherein the restricted region of memory is restricted by the firewall. 11. The apparatus of claim 8 , the actions further including: detecting a read request to a restricted region of memory, wherein the read request is associated with the first processor; and in response to detecting the read request to the restricted region of memory, providing a data value that causes an exception in response to execution by the first processor. 12. The apparatus of claim 8 , the actions further including determining the data value that causes an infinite loop or a data value that causes a branch to logging detection of the read request by the first processor based on a look-up table and an indication of the first processor as an input to the look-up table. 13. The apparatus of claim 8 , wherein the read request is associated with the first processor via a master identifier (ID) that is associated with the read request. 14. The apparatus of claim 8 , wherein the device further includes a second processor, and wherein the data value also causes an infinite loop or a data value that causes a branch to logging detection of the read request in response to execution by the second processor. 15. A method, comprising: detecting that a read request is a read request to a restricted region of memory, wherein the read request is associated with a first processor; responsive to detecting the read request to the restricted region of memory, providing, as data read by the read request in lieu of reading data in the restricted region of memory, a data value; receiving an instruction to execute the data value; and via the first processor, executing the data value responsive to the instruction to execute the data value, the execution of the data value causing an exception. 16. The method of claim 15 , further comprising, in response to detecting a read request to an unmapped region of memory, providing a data value that causes an exception in response to execution by the first processor. 17. The method of claim 15 , wherein the restricted region of memory is restricted by a firewall. 18. The method of claim 15 , further comprising: detecting the read request to a restricted region of memory, wherein the read request is associated with a first processor; and in response to detecting the read request to the restricted region of memory, providing a data value that causes an infinite loop or a data value that causes a branch to logging detection of the read request. 19. The method of claim 15 , wherein the read request is associated with the first processor via a master identifier (ID) that is associated with the read request. 20. The method of claim 15 , wherein the data value also causes an exception in response to execution by a second processor.

Assignees

Inventors

Classifications

  • for a range · CPC title

  • during program execution, e.g. stack integrity {; Preventing unwanted data erasure; Buffer overflow} · CPC title

  • Security improvement · CPC title

  • for separating internal from external traffic, e.g. firewalls · CPC title

  • G06F21/54Primary

    by adding security routines or objects to programs · CPC title

Patent family

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External sources

Frequently asked questions

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What does patent US11036654B2 cover?
The disclosed technology is generally directed to protection against unauthorized code. In one example of the technology, a read request to a restricted region of memory is detected. The read request is associated with a first processor. In response to detecting the read request to the restricted region of memory, a data value that causes an exception in response to execution by the first proce…
Who is the assignee on this patent?
Microsoft Technology Licensing Llc
What technology area does this patent fall under?
Primary CPC classification G06F21/54. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Jun 15 2021 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).