General machine learning model, and model file generation and parsing method

US11036480B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11036480-B2
Application numberUS-202017130469-A
CountryUS
Kind codeB2
Filing dateDec 22, 2020
Priority dateJun 8, 2018
Publication dateJun 15, 2021
Grant dateJun 15, 2021

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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Abstract

Official abstract text for this publication.

Disclosed are a general machine learning model generation method and apparatus, and a computer device and a storage medium. The method comprises: acquiring task parameters of a machine learning task (S 1201 ); performing classification processing on the task parameters to obtain task instructions and model parameters (S 1202 ); aggregating the task instructions and the model parameters according to a data type to obtain stack data and heap data (S 1203 ); and integrating the stack data and the heap data to obtain a general machine learning model (S 1204 ). By means of the method, compiled results of a corresponding general model in the running of an algorithm can be directly executed, which avoids repetitive compilation, thus greatly improving the efficiency of machine learning algorithm implementation and shortening the time from compilation to obtaining execution results.

First claim

Opening claim text (preview).

The invention claimed is: 1. A method for executing a general-purpose machine learning model in a hardware computing unit, comprising: obtaining a general-purpose machine learning model; disassembling sharable data in the general-purpose machine learning model into stack data and allocating the stack data to a stack area of the hardware computing unit, wherein the stack data is data which is unsharable among cores in a multi-core developing platform; disassembling unsharable data in the general-purpose machine learning model into heap data and allocating the heap data to a heap area of the hardware computing unit, wherein the heap data is data which is sharable among cores in a multi-core developing platform, and allocating the heap data to a heap area includes: dividing the heap area into a model parameter dynamic heap area and a model parameter static heap area, allocating the model parameter dynamic data to the model parameter dynamic heap area, and allocating the model parameter static data to the model parameter static heap area; storing heap data that changes during operation as model parameter dynamic data, and storing heap data that does not change during operation as model parameter static data; allocating the model parameter dynamic data to the model parameter dynamic heap area includes: adding a storage space of the model parameter dynamic data, a storage space of the input data, and a storage space of the output data to obtain a size of a second storage space, and allocation a storage space of the model parameter dynamic heap area, wherein the storage space of the model Parameter dynamic heap area is greater than or equal to the size of the first storage space; and computing the stack area data in the stack area, and the heap area data in the heap area, and input data to obtain output data. 2. The method of claim 1 , wherein the stack area data includes stack data, and the heap area data includes heap data. 3. The method of claim 2 , wherein the stack data includes model parameter stack data, and the step of allocating the stack data to the stack area includes: allocating the model parameter stack data to a model parameter stack area. 4. The method of claim 3 , wherein the step of allocating the model parameter stack data to a model parameter stack area includes: calculating a sum of a size of a storage space required for the model parameter stack data and a size of a temporary storage space of an intermediate result to obtain a size of a first storage space, and allocating a storage space of the model parameter stack area, wherein the storage space of the model parameter stack area is greater than or equal to the size of the first storage space. 5. The method of claim 1 , wherein the storage space of the model parameter static heap area is greater than or equal to the storage space of the model parameter static data. 6. The method of claim 1 , wherein the model parameter static data includes task instruction heap data. 7. The method of claim 1 , wherein the step of allocating the heap data to a heap area includes: allocating the model parameter dynamic heap area and the model parameter static heap area into a segment of consecutive storage space. 8. The method of claim 1 , wherein data in the heap area includes the model parameter dynamic data, the model parameter static data, the input data, and the output data. 9. The method of claim 1 , wherein the step of computing the stack area data in the stack area, the heap area data in the heap area, and the input data to obtain output data includes: extracting the output data from the heap area, and outputting the output data. 10. A device comprising modules embedded in the form of hardware in a processor for executing a general-purpose machine learning model, comprising: a model obtaining module configured to obtain a general-purpose machine learning model; a model disassembling module configured to disassemble sharable data in the general-purpose machine learning model into stack data and allocate the stack data to a stack area, wherein the stack data is data which is unsharable among cores in a multi-core developing platform: disassemble unsharable data in the general-purpose machine learning model into heap data and allocate the heap data to a heap area, wherein the stack data is data which is unsharable among cores in a multi-core developing platform, and the heap data is data which is sharable among cores in a multi-core developing platform, and allocating the heap data to a heap area includes: dividing the heap area into a model parameter dynamic heap area and a model parameter static heap area, allocating the model parameter dynamic data to the model parameter dynamic heap area, and allocating the model parameter static data to the model parameter static heap area; storing heap data that changes during operation as model parameter dynamic data, and storing heap data that does not change during operation as model parameter static data; allocating the model parameter dynamic data to the model parameter dynamic heap area includes: adding a storage space of the model parameter dynamic data, a storage space of the input data, and a storage space of the output data to obtain a size of a second storage space, and allocating a storage space of the model parameter dynamic heap area, wherein the storage space of the model parameter dynamic heap area is greater than or equal to the size of the first storage space; and a result output module configured compute the stack area data in the stack area, the heap area data in the heap area, and input data to obtain output data. 11. The device of claim 10 , wherein the stack area data includes stack data, and the heap area data includes heap data. 12. The device of claim 11 , wherein the stack area data allocation module is further configured to allocate the stack data to a stack area. 13. The device of claim 11 , wherein the heap area data allocation module is further configured to allocate the heap data to a heap area. 14. The device of claim 11 , wherein the stack data includes model parameter stack data, and the stack data allocation module is further configured to allocate the model parameter stack data to a model parameter stack area. 15. A non-transitory computer readable memory embedding computer readable instruction, when a processor executing the instruction: implementing a general-purpose machine learning model in a hardware computing unit, comprising: obtaining a general-purpose machine learning model; disassembling sharable data in the general-purpose machine learning model into stack data and allocating the stack data to a stack area of the hardware computing unit, wherein the stack data is data which is unsharable among cores in a multi-core developing platform; disassembling unsharable data in the general-purpose machine learning model into heap data and allocating the heap data to a heap area of the hardware computing unit, wherein the heap data is data which is sharable among cores in a multi-core developing platform, and allocating the heap data to a heap area includes: dividing the heap area into a model parameter dynamic heap area and a model parameter static heap area, allocating the model parameter dynamic data to the model parameter dynamic heap area, and allocating the model parameter static data to the model parameter static heap area; storing heap data that changes during operation as model parameter dynamic data, and storing heap data that does not change during operation as model parameter static data; allocating the model parameter dynamic data to the model parame

Assignees

Inventors

Classifications

  • Shells for specifying net layout · CPC title

  • G06F8/35Primary

    model driven · CPC title

  • Target code generation · CPC title

  • G06N20/00Primary

    Machine learning · CPC title

  • G06F8/433Primary

    Dependency analysis; Data or control flow analysis · CPC title

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Frequently asked questions

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What does patent US11036480B2 cover?
Disclosed are a general machine learning model generation method and apparatus, and a computer device and a storage medium. The method comprises: acquiring task parameters of a machine learning task (S 1201 ); performing classification processing on the task parameters to obtain task instructions and model parameters (S 1202 ); aggregating the task instructions and the model parameters accordin…
Who is the assignee on this patent?
Shanghai Cambricon Inf Tech Co Ltd
What technology area does this patent fall under?
Primary CPC classification G06F8/35. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Jun 15 2021 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).