Array substrate and display device with backside camera

Patent metadata

Field	Value
Publication number	US-11031445-B2
Application number	US-201916629568-A
Country	US
Kind code	B2
Filing date	Sep 25, 2019
Priority date	May 23, 2019
Publication date	Jun 8, 2021
Grant date	Jun 8, 2021

Abstract

The present application provides an array substrate and a display device, including a thin film transistor layer, a planarization layer and a pixel definition layer prepared on a base substrate in turn. The base substrate disposes a camera area in a display area, and the camera area includes a first blinding hole and a wiring area. The first blind hole is used to expose a camera disposed on a back of the base substrate, and the wiring area disposes signal lines and second blind holes. The second blind holes are arranged to avoid the signal lines.

First claim

What is claimed is:

1. An array substrate, comprising a base substrate, a thin film transistor layer, a planarization layer, and a pixel definition layer prepared on the base substrate in turn, the pixel definition layer being used to define pixel opening areas;
the base substrate disposing a camera area in a display area, and the camera area including a first blind hole and a wiring area around the first blind hole;
the first blind hole being used to expose a camera disposed on a back of the base substrate, and the wiring area disposing signal lines and second blind holes;
wherein, the second blind holes are arranged to avoid the signal lines for increasing a light transmittance of the wiring area.

2. The array substrate as claimed in claim 1 , wherein each of the second blind holes is correspondingly defined between two adjacent pixel opening areas, and the second blind holes are arranged in grid-shaped or arranged at intervals.

3. The array substrate as claimed in claim 1 , wherein each of the second blind holes passes through or partially passes through one or more of the pixel definition layer, the planarization layer, and the thin film transistor layer.

4. The array substrate as claimed in claim 3 , wherein the thin film transistor layer includes inorganic film layers arranged in layers and thin film transistors arranged at intervals; and each of the second blind holes corresponds to a position between two adjacent thin film transistors.

5. The array substrate as claimed in claim 4 , wherein the second blind holes, the signal lines, and the thin film transistors are separated by the inorganic film layers.

6. The array substrate as claimed in claim 1 , wherein the base substrate defines grooves corresponding to the wiring area on the back of the base substrate away from the pixel definition layer; and a thickness of the base substrate corresponding to the grooves is less than that of other positions of the base substrate.

7. The array substrate as claimed in claim 6 , wherein the grooves correspond to the second blind holes and are arranged along the second blind holes.

8. A display device comprising the array substrate as claimed in claim 1 , wherein the display device further comprises:
an organic light emitting layer disposed on the array substrate and corresponding to the pixel opening areas;
a film packaging layer disposed on the organic light emitting layer; and
the camera disposed on a back of the array substrate away from the organic light emitting layer and corresponding to the camera area;
wherein the first blind hole of the camera area is used to expose the camera, and the second blind holes of the wiring area are filled with transparent material for increasing the light transmittance of the wiring area.

9. The display device as claimed in claim 8 , wherein the film packaging layer at least includes a first inorganic packaging layer, an organic packaging layer, and a second inorganic packaging layer arranged in layers, and the second blind holes are filled with the first inorganic packaging layer.

10. An array substrate, comprising a base substrate, a thin film transistor layer, a planarization layer, and a pixel definition layer prepared on the base substrate in turn, the pixel definition layer being used to define pixel opening areas;
the base substrate disposing a camera area in a display area, and the camera area including a first blind hole and a wiring area around the first blind hole;
the first blind hole being used to expose a camera disposed on a back of the base substrate, and the wiring area disposing signal lines and second blind holes;
wherein, the second blind holes are arranged to avoid the signal lines and are filled with transparent material for increasing a light transmittance of the wiring area.

11. The array substrate as claimed in claim 10 , wherein each of the second blind holes is correspondingly defined between two adjacent pixel opening areas, and the second blind holes are arranged in grid-shaped or arranged at intervals.

12. The array substrate as claimed in claim 10 , wherein each of the second blind holes passes through or partially passes through one or more of the pixel definition layer, the planarization layer, and the thin film transistor layer.

13. The array substrate as claimed in claim 12 , wherein the thin film transistor layer includes inorganic film layers arranged in layers and thin film transistors arranged at intervals; and each of the second blind holes corresponds to a position between two adjacent thin film transistors.

14. The array substrate as claimed in claim 13 , wherein the second blind holes, the signal lines, and the thin film transistors are separated by the inorganic film layers.

15. The array substrate as claimed in claim 10 , wherein the base substrate defines grooves corresponding to the wiring area on the back of the base substrate away from the pixel definition layer; and a thickness of the base substrate corresponding to the grooves is less than that of other positions of the base substrate.

16. The array substrate as claimed in claim 15 , wherein the grooves correspond to the second blind holes and are arranged along the second blind holes.

Assignees

• Wuhan China Star Optoelectronics Semiconductor Display Tech Co Ltd

Inventors

• Zheng Min
• Zhou Yang
• Ouyang Qi
• Gao Hong

Classifications

• H10K59/12

  Active-matrix OLED [AMOLED] displays · CPC title

• H10K59/873

  Encapsulations · CPC title

• H10K59/122

  Pixel-defining structures or layers, e.g. banks · CPC title

• H10K59/131 Primary

  Interconnections, e.g. wiring lines or terminals · CPC title

• H10D86/0212

  comprising manufacture, treatment or coating of substrates · CPC title