Semiconductor devices having silicon/germanium active regions with different germanium concentrations

Patent metadata

Field	Value
Publication number	US-11031406-B2
Application number	US-201916416477-A
Country	US
Kind code	B2
Filing date	May 20, 2019
Priority date	Apr 4, 2018
Publication date	Jun 8, 2021
Grant date	Jun 8, 2021

Abstract

A semiconductor device includes a first transistor element having a first channel region and a second transistor element having a second channel region, wherein the first channel region includes a first crystalline silicon/germanium (Si/Ge) material mixture having a first germanium concentration, and wherein the second channel region includes a second crystalline Si/Ge material mixture having a second germanium concentration that is higher than the first germanium concentration.

First claim

What is claimed:

1. A semiconductor device, comprising:
a first transistor element comprising a first channel region, said first channel region comprising a first crystalline silicon/germanium (Si/Ge) material mixture having a first germanium concentration;
a second transistor element comprising a second channel region, said second channel region comprising a second crystalline Si/Ge material mixture having a second germanium concentration that is higher than said first germanium concentration; and
a third transistor element comprising a third channel region, wherein said third channel region comprises a third crystalline semiconductor material having a lower germanium concentration than said first and second germanium concentrations.

2. The semiconductor device of claim 1 , wherein said second germanium concentration is higher than said first germanium concentration by approximately 2-10 atomic percent.

3. The semiconductor device of claim 1 , wherein said first germanium concentration is in a range of approximately 10-18 atomic percent and said second germanium concentration is in a range of approximately 19-30 atomic percent.

4. The semiconductor device of claim 1 , wherein said first channel region is formed in a first active region having a first thickness and said second channel region is formed in a second active region having a second thickness that is greater than said first thickness.

5. The semiconductor device of claim 1 , wherein said first channel region is formed in a first active region having a first thickness and said second channel region is formed in a second active region having a second thickness that is substantially equal to said first thickness.

6. The semiconductor device of claim 1 , wherein a width of said first active region is approximately 60 nm or less.

7. The semiconductor device of claim 1 , wherein at least one of said first transistor element and said second transistor element is a fully depleted semiconductor-on-insulator (SOI) transistor element.

8. A semiconductor device, comprising:
a substrate;
a buried insulating layer positioned above said substrate;
a semiconductor material layer positioned above said buried insulating layer;
a first active region formed in said semiconductor material layer, wherein said first active region has a first region thickness and comprises a first crystalline silicon/germanium (Si/Ge) material mixture having a first germanium concentration;
a first transistor element formed in and above said first active region;
a second active region formed in said semiconductor material layer, wherein said second active region has a second region thickness and comprises a second crystalline Si/Ge material mixture having a second germanium concentration that is higher than said first germanium concentration;
a second transistor element formed in and above said second active region;
a third active region formed in said semiconductor material layer, wherein said third active region has a third region thickness that is substantially the same as at least one of said first and second thicknesses, and wherein said third active region comprises a third crystalline material having a germanium concentration that is lower than said first and second germanium concentrations; and
a third transistor element formed in and above said third active region.

9. The semiconductor device of claim 8 , wherein said first and second active regions are laterally delineated by an isolation region extending through at least said semiconductor material layer.

10. The semiconductor device of claim 8 , wherein said second germanium concentration is higher than said first germanium concentration by approximately 2-10 atomic percent.

11. The semiconductor device of claim 8 , wherein said first germanium concentration is in a range of approximately 10-18 atomic percent and said second germanium concentration is in a range of approximately 19-30 atomic percent.

12. The semiconductor device of claim 8 , wherein a width of said first active region is approximately 60 nm or less.

13. The semiconductor device of claim 8 , wherein at least one of said first transistor element and said second transistor element is a fully depleted transistor element.

14. The semiconductor device of claim 8 , wherein said second thickness is greater than said first thickness.

15. The semiconductor device of claim 8 , wherein said second thickness is substantially equal to said first thickness.

16. A semiconductor device, comprising:
a semiconductor-on-insulator (SOI) substrate comprising a base substrate material, a buried insulating layer positioned above said base substrate material, and a semiconductor material layer positioned above said buried insulating layer;
a first active region formed in said semiconductor material layer, said first active region having a first region thickness and comprising a first crystalline silicon/germanium (Si/Ge) material mixture having a first germanium concentration;
a first transistor element formed in and above said first active region;
a second active region formed in said semiconductor material layer, said second active region having a second region thickness that is substantially equal to or greater than said first region thickness and comprising a second crystalline Si/Ge material mixture having a second germanium concentration that is higher than said first germanium concentration by at least approximately 2-10 atomic percent;
a second transistor element formed in and above said second active region;
a third active region formed in said semiconductor material layer, said third active region having a third region thickness that is substantially the same as at least one of said first and second thicknesses, wherein said third active region comprises a third crystalline material having a lower germanium concentration than said first and second germanium concentrations; and
a third transistor element formed in and above said third active region.

17. The semiconductor device of claim 16 , wherein said first germanium concentration is in a range of approximately 10-18 atomic percent and said second germanium concentration is in a range of approximately 19-30 atomic percent.

18. The semiconductor device of claim 16 , wherein at least one of said first, second, and third transistor elements is a fully depleted transistor element.

19. The semiconductor device of claim 16 , wherein a width of said first active region is approximately 60 nm or less.

20. The semiconductor device of claim 16 , wherein said first active region and said second active region are laterally delineated by an isolation region extending through at least said semiconductor material layer.

Assignees

• Globalfoundries Us Inc

Inventors

• Smith Elliot John
• Grasshoff Gunter
• Peters Carsten

Classifications

• H10P50/283

  by chemical means · CPC title

• H10P14/6308

  of Group IV semiconductors · CPC title

• H10P14/3411

  Silicon, silicon germanium or germanium · CPC title

• H10P14/271

  characterised by the preparation of substrate for selective deposition · CPC title

• H10P14/24

  using chemical vapour deposition [CVD] · CPC title