Shielded electronic component package

US11031366B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11031366-B2
Application numberUS-201916435789-A
CountryUS
Kind codeB2
Filing dateJun 10, 2019
Priority dateFeb 18, 2010
Publication dateJun 8, 2021
Grant dateJun 8, 2021

How to read this patent

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  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

An electronic component package includes a substrate and an electronic component mounted to the substrate, the electronic component including a bond pad. A first antenna terminal is electrically connected to the bond pad, the first antenna terminal being electrically connected to a second antenna terminal of the substrate. A package body encloses the electronic component, the package body having a principal surface. An antenna is formed on the principal surface by applying an electrically conductive coating. An embedded interconnect extends through the package body between the substrate and the principal surface and electrically connects the second antenna terminal to the antenna. Applying an electrically conductive coating to form the antenna is relatively simple thus minimizing the overall package manufacturing cost. Further, the antenna is relatively thin thus minimizing the overall package size.

First claim

Opening claim text (preview).

What is claimed is: 1. An electronic component package comprising: an electronic component comprising a component upper side, a component lower side, and a component first lateral side; a substrate comprising: a substrate upper side coupled to the component lower side; a substrate lower side; a substrate first lateral side; and a shield trace at the substrate upper side; a wire coupled to the shield trace; an encapsulating material in contact with and encapsulating at least a portion of the substrate upper side, at least a portion of the component first lateral side, and at least a portion of the wire, the encapsulating material comprising an encapsulant upper side, an encapsulant lower side coupled to the substrate upper side, and an encapsulant first lateral side; and a conformal shield layer on the encapsulating material and coupled to the wire at the encapsulant upper side, wherein: the conformal shield layer vertically covers at least a portion of the electronic component; the conformal shield layer laterally covers at least a portion of the electronic component; and the conformal shield layer laterally covers at least a portion of the substrate. 2. The electronic component package of claim 1 , wherein the conformal shield layer laterally covers an entirety of the electronic component and an entirety of the substrate. 3. The electronic component package of claim 1 , wherein the conformal shield layer directly contacts the substrate, but does not directly contact the electronic component. 4. The electronic component package of claim 1 , further comprising a plurality of additional wires coupled to the shield trace and to the conformal shield layer. 5. The electronic component package of claim 1 , wherein an entirety of the wire is positioned directly above the shield trace. 6. The electronic component package of claim 1 , wherein at least a portion of the shield trace is laterally displaced in a first direction from the electronic component, and the substrate comprises: a first pad at the substrate upper side and displaced in the first direction from the electronic component; a second pad at the substrate upper side and displaced in the first direction from the electronic component; and a trace through which the second pad is electrically coupled to the first pad, wherein the first pad is laterally closer to the electronic component than the shield trace, and the shield trace is laterally closer to the electronic component than the second pad. 7. The electronic component package of claim 1 , wherein the electronic component comprises a semiconductor die. 8. An electronic component package comprising: an electronic component comprising a component upper side, a component lower side, a component first lateral side facing a first direction, and a component second lateral side facing a second direction; a substrate comprising: a substrate upper side coupled to the component lower side; a substrate bottom side; a substrate first lateral side; a substrate second lateral side; and a trace at the substrate upper side and displaced in the first direction from the component first lateral side; a first wire coupled to the trace; an encapsulating material that encapsulates at least a portion of the substrate upper side, at least a portion of the component first lateral side, and at least a portion of the first wire, the encapsulating material comprising an encapsulant upper side, an encapsulant lower side coupled to the substrate upper side, and an encapsulant first lateral side; and a conformal conductive layer on the encapsulating material and coupled to the wire at the encapsulant upper side, wherein: the conformal conductive layer vertically covers at least a portion of the electronic component; and the conformal conductive layer comprises a first indentation directly above the first wire. 9. The electronic component package of claim 8 , wherein the conformal conductive layer laterally covers at least a portion of the component first lateral side and at least a portion of the substrate first lateral side. 10. The electronic component package of claim 8 , wherein the conformal conductive layer laterally covers an entirety of the electronic component and an entirety of the substrate. 11. The electronic component package of claim 8 , wherein the conformal conductive layer directly contacts the encapsulating material. 12. The electronic component package of claim 8 , wherein the conformal conductive layer directly contacts the substrate first lateral side, but not the component first lateral side. 13. The electronic component package of claim 8 , further comprising a second wire coupled to the substrate upper side and to the conformal conductive layer, wherein the conformal conductive layer comprises a second indentation directly above the second wire. 14. The electronic component package of claim 13 , wherein the first wire is laterally displaced from the electronic component in the first direction, the second wire is laterally displaced from the electronic component in the second direction. 15. The electronic component package of claim 14 , wherein the second direction is opposite the first direction. 16. The electronic component package of claim 8 , wherein an entirety of the first wire is positioned vertically above the trace. 17. The electronic component package of claim 8 , wherein a plurality of wire ends are coupled to the trace. 18. A method of manufacturing an electronic component package, the method comprising: providing an electronic component comprising a component upper side, a component lower side, a component first lateral side facing a first direction, and a component second lateral side facing a second direction; providing a substrate comprising: a substrate upper side coupled to the component lower side; a substrate bottom side; a substrate first lateral side; a substrate second lateral side; and a trace at the substrate upper side and displaced in the first direction from the component first lateral side; providing a first wire coupled to the trace; encapsulating, with an encapsulating material, at least a portion of the substrate upper side, at least a portion of the component first lateral side, and at least a portion of the first wire, the encapsulating material comprising an encapsulant upper side, an encapsulant lower side coupled to the substrate upper side, and an encapsulant first lateral side; and providing a conformal conductive layer on the encapsulating material and coupled to the wire at the encapsulant upper side, wherein: the conformal conductive layer vertically covers at least a portion of the electronic component; and the conformal conductive layer comprises a first indentation directly above the first wire. 19. The method of claim 18 , wherein the conformal conductive layer laterally covers at least a portion of the component first lateral side and at least a portion of the substrate first lateral side. 20. The method of claim 18 , further comprising forming a second wire coupled to the substrate upper side and to the conformal conductive layer, wherein: the conformal conductive layer comprises a second indentation directly above the second wire; and the first wire is laterally displaced from the electronic component in the first direction; and the second wire is laterally displaced from the electronic component in the second direction. 21. The method of claim 18 , wherein the encapsulating material

Assignees

Inventors

Classifications

  • Shielding bumps · CPC title

  • the arrangements being on an external surface of the package, e.g. on the outer surface of an encapsulation · CPC title

  • Encapsulations, e.g. protective coatings · CPC title

  • Vias, e.g. via plugs · CPC title

  • Die-attach connectors and bond wires · CPC title

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Frequently asked questions

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What does patent US11031366B2 cover?
An electronic component package includes a substrate and an electronic component mounted to the substrate, the electronic component including a bond pad. A first antenna terminal is electrically connected to the bond pad, the first antenna terminal being electrically connected to a second antenna terminal of the substrate. A package body encloses the electronic component, the package body havin…
Who is the assignee on this patent?
Amkor Tech Singapore Holding Pte Ltd, Amkor Tech Singapore Pte Ltd
What technology area does this patent fall under?
Primary CPC classification H10W90/701. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jun 08 2021 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 7 related publications on this page (citations in our corpus or others sharing the same primary CPC).