Ground disconnect detection for multiple voltage domains

Patent metadata

Field	Value
Publication number	US-11029366-B2
Application number	US-201916539405-A
Country	US
Kind code	B2
Filing date	Aug 13, 2019
Priority date	Aug 13, 2019
Publication date	Jun 8, 2021
Grant date	Jun 8, 2021

Abstract

Methods and apparatus for an IC package having an impedance detector module configured to have: a first connection to a first external energy source via a first IO pin of the IC package and a second connection to a detection component. In embodiments, the detection component is configured for connection to a first ground for the first external energy source via a second IO pin of the IC package, and to a barrier component, which is configured for connection to a second ground for a second external energy source via a third IO pin of the IC package. The impedance detector module is configured to detect a disconnection or degradation of a connection to ground.

First claim

What is claimed is:

1. An IC package, comprising:
an impedance detector module configured to have:
a first connection to a first external energy source via a first IO pin of the IC package;
a second connection to a detection component, which is configured for connection to a first ground for the first external energy source via a second IO pin of the IC package, and to a barrier component, which is configured for connection to a second ground for a second external energy source via a third IO pin of the IC package.

2. The IC package according to claim 1 , wherein the IC package includes a fourth IO pin configured for connection to the second external energy source.

3. The IC package according to claim 1 , wherein the impedance detector module includes a threshold detector for detecting a level on the second connection that is above or below a given threshold due to a disconnection in continuity of a path to the second ground.

4. The IC package according to claim 1 , wherein the level corresponds to a current level.

5. The IC package according to claim 1 , wherein the impedance detector module is configured to inject a signal into the detection component and the barrier component.

6. The IC package according to claim 5 , wherein the detection component and the barrier component are connected in parallel.

7. The IC package according to claim 5 , wherein the injected signal has a frequency corresponding to impedances of the detection and barrier capacitances.

8. The IC package according to claim 1 , wherein the IC package includes a first die portion for a first voltage domain and a second die portion for a second voltage domain, wherein the first die portion and the second die portion are electrically isolated from each other.

9. The IC package according to claim 8 , wherein the first and second die portions are part of a single die separated by an etched trench filled with an insulating material.

10. The IC package according to claim 8 , wherein the first die portion is configured for connection to the first external energy source and the second die portion is configured for connection to the second energy source.

11. The IC package according to claim 8 , wherein the first and second die portions are between upper and lower dielectric layers.

12. The IC package according to claim 8 , wherein the barrier component comprises a barrier component having a first plate in the first voltage domain and a second plate in the second voltage domain.

13. The IC package according to claim 1 , wherein the IC package includes a first die portion for a first voltage domain and a second die portion for a second voltage domain, wherein the first die portion and the second die portion are electrically isolated from each other, and wherein the upper dielectric layer comprises an intermetallic dielectric (IMD) layer.

14. The IC package according to claim 1 , wherein the first external energy source comprises a 12V battery and the second external energy source comprises a 48V battery.

15. A method, comprising:
for an IC package, employing:
an impedance detector module configured to have:
a first connection to a first external energy source via a first IO pin of the IC package;
a second connection to a detection component, which is configured for connection to a first ground for the first external energy source via a second IO pin of the IC package, and to a barrier component, which is configured for connection to a second ground for a second external energy source via a third IO pin of the IC package.

16. The method according to claim 15 , wherein the IC package includes a fourth IO pin configured for connection to the second external energy source.

17. The method according to claim 15 , wherein the impedance detector module includes a threshold detector for detecting a level on the second connection that is above or below a given threshold due to a disconnection in continuity of a path to the second ground.

18. The method according to claim 15 , wherein the level corresponds to a current level.

19. The method according to claim 15 , wherein the impedance detector module is configured to inject a signal into the detection component and the barrier component.

20. The method according to claim 19 , wherein the detection component and the barrier component are connected in parallel.

21. The method according to claim 19 , wherein the injected signal has a frequency corresponding to impedances of the detection and barrier capacitances.

22. The method according to claim 15 , wherein the IC package includes a first die portion for a first voltage domain and a second die portion for a second voltage domain, wherein the first die portion and the second die portion are electrically isolated from each other.

23. The method according to claim 22 , wherein the first and second die portions are part of a single die separated by an etched trench filled with an insulating material.

24. The method according to claim 22 , wherein the first die portion is configured for connection to the first external energy source and the second die portion is configured for connection to the second energy source.

25. The method according to claim 22 , wherein the first and second die portions are between upper and lower dielectric layers.

26. The method according to claim 22 , wherein the barrier component comprises a barrier component having a first plate in the first voltage domain and a second plate in the second voltage domain.

27. The method according to claim 15 , wherein the IC package includes a first die portion for a first voltage domain and a second die portion for a second voltage domain, wherein the first die portion and the second die portion are electrically isolated from each other, and wherein the upper dielectric layer comprises an intermetallic dielectric (IMD) layer.

28. The method according to claim 15 , wherein the first external energy source comprises a 12V battery and the second external energy source comprises a 48V battery.

29. An IC package, comprising:
an impedance detector means for connecting to a first external energy source via a first IO pin of the IC package and for connection to a detection component, which is configured for connection to a first ground for the first external energy source via a second IO pin of the IC package, and to a barrier component, which is configured for connection to a second ground for a second external energy source via a third IO pin of the IC package; and
a fourth IO pin configured for connection to the second external energy source,
wherein the impedance detector means includes a threshold detector for detecting a level on the second connection that is above or below a given threshold due to a disconnection in continuity of a path to the second ground.

30. The IC package according to claim 29 , wherein the impedance detector means includes a signal injector for injecting a signal into the detection component and the barrier component.

31. The IC package according to claim 29 , wherein the IC package includes a first die portion for a first voltage domain and a second die portion for a second voltage domain, wherein the first die portion and the second die portion are electrically isolated from each other.

32. The IC package according to claim 31 , wherein the firs

Assignees

• Allegro Microsystems Llc

Inventors

• Briano Robert A

Classifications

• G01R31/52

  Testing for short-circuits, leakage current or ground faults · CPC title

• G01R31/50 Primary

  Testing of electric apparatus, lines, cables or components for short-circuits, continuity, leakage current or incorrect line connections (testing of sparking plugs H01T13/58) · CPC title

• H02H5/105

  responsive to deterioration or interruption of earth connection (for preventing switching-on H02H11/001) · CPC title

• G01R31/006 Primary

  on road vehicles, e.g. automobiles or trucks (testing of ignition installations peculiar to internal combustion engines F02P17/00) · CPC title