High input impedance, high dynamic range, common-mode-interferer tolerant sensing front-end for neuromodulation systems

Patent metadata

Field	Value
Publication number	US-11025215-B2
Application number	US-201716467456-A
Country	US
Kind code	B2
Filing date	Dec 7, 2017
Priority date	Dec 7, 2016
Publication date	Jun 1, 2021
Grant date	Jun 1, 2021

Abstract

Neuromodulation systems in accordance with embodiments of the invention can use a feed-forward common-mode cancellation (CMC) path to attenuate common-mode (CM) artifacts appearing at a voltage input, thus allowing for the simultaneous recording of neural data and stimulation of neurons. In several embodiments of the invention, the feed-forward CMC path is utilized to attenuate the common-mode swings at Vin,CM, which can restore the linear operation of the front-end for differential signals. In several embodiments, the neuromodulation system may utilize an anti-alias filter (AAF) that includes a duty-cycles resistor (DCR) switching at a first frequency f1, followed by a DCR switching at a second frequency f2. The AAF allows for a significantly reduced second frequency f2 that enables the multi-rate DCR to increase the maximum realizable resistance, which is dependent upon the frequency ratio f1/f2.

First claim

What is claimed is:

1. A chopper amplifier comprising:
a pair of inputs V in, CM configured to receive a differential input signal and a common-mode (CM) signal;
an input capacitor C in connected in series with each of the pair of inputs V in, CM having capacitance C in ;
an operational amplifier g m ; and
a common-mode cancellation (CMC) path to attenuate common-mode (CM) swings at V in, CM , comprising:
an operational amplifier g ma with a gain A cm and capacitors C a and C b configured to sense and amplify an input CM signal; and
C cm capacitors configured to subtract the amplified CM signal from the input signal V in, CM received on each of the pair of inputs.

2. The chopper amplifier of claim 1 , wherein the C cm capacitors have capacitances that are the ratio of the capacitance of the input capacitors C in and the gain A CM of the operational amplifier.

3. The chopper amplifier of claim 1 , wherein a gain in the CMC path is set by the capacitor ratio A cm =2 C a /C b .

4. The chopper amplifier of claim 1 , wherein a C cm capacitor is sized to be C in /A cm .

5. The chopper amplifier of claim 1 , wherein capacitor C in and C cm are matching.

6. The chopper amplifier of claim 1 , wherein capacitor C cm is sized smaller than capacitor C in to minimize increase in input-referred noise.

7. The chopper amplifier of claim 1 , further comprising power supply circuitry configured to integrate a charge-pump on-chip to generate a local voltage supply for the operational amplifier g ma in the CMC path from the available voltage supply.

8. The chopper amplifier of claim 1 , wherein bandwidth of the CMC path is greater than the bandwidth of the CM artifacts.

9. The chopper amplifier of claim 1 , wherein the requirements of g ma are:

g
ma

⁡

(

C
b

C
b

+

2
⁢

C
a

)

⁢

1

2
⁢

π
⁡

(

C
b

+

2
⁢

C
cm

)

>

30
⁢

⁢

kHz
.

10. The chopper amplifier of claim 1 , wherein there is no chopping at an output of the CMC path such that the CM-to-DM (differential mode) signal at the CMC output remains at baseband as compared to the up-modulated differential input signal.

11. The chopper amplifier of claim 1 , further comprising at least one feedback loop including a multi-rate duty-cycled resistor (MDCR), wherein the MDCR comprises a first anti-alias filter (AAF) comprising a duty-cycled resistor (DCR) formed by R 1 switching at frequency f 1 , and a capacitor C 1 followed by a second low-pass filter formed by a DCR R 2 switching at frequency f 2 , and a capacitor C 2 , wherein the AAF allows for a significantly reduced switching frequency f 2 , as the AAF reduces the bandwidth of the signal flowing into the second low-pass filter.

12. The chopper amplifier of claim 11 , wherein a lower limit on the switching frequency f 2 is determined by the bandwidth f aaf of the AAF and the required attenuation of the aliased components.

13. The chopper amplifier of claim 1 , further comprising an auxiliary path comprising two storage capacitors with capacitance C aux and switching circuitry configured using offset modulation to pre-charge the input capacitors C in during a pre-charging phase.

14. The chopper amplifier of claim 12 , further comprising passive mixers M 1,2 in the auxiliary path, where a frequency of a ripple at electrodes is equal to the clock frequency F aux used in the mixers M 1,2 .

Assignees

• Univ California

Inventors

• Chandrakumar Hariprasad
• Markovic Dejan

Classifications

• A61M21/00

  Other devices or methods to cause a change in the state of consciousness; Devices for producing or ending sleep by mechanical, optical, or acoustical means, e.g. for hypnosis · CPC title

• H03F3/45928

  using IC blocks as the active amplifying circuit · CPC title

• H03F2200/261

  Amplifier which being suitable for instrumentation applications · CPC title

• H03F3/45475 Primary

  using IC blocks as the active amplifying circuit · CPC title

• H03F1/26

  Modifications of amplifiers to reduce influence of noise generated by amplifying elements · CPC title