Charge pump with switching LDO function for output voltage regulation
US-10530249-B1 · Jan 7, 2020 · US
US11025081B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-11025081-B2 |
| Application number | US-201916240789-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jan 6, 2019 |
| Priority date | May 16, 2018 |
| Publication date | Jun 1, 2021 |
| Grant date | Jun 1, 2021 |
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A wireless power system receives an input voltage signal from a first node of a secondary side coil, comprises an active rectifier, a buck converter, and a linear charger comprising a first resistor, a second resistor, a third resistor, a mode switching circuit, a current mirror circuit. The active rectifier rectifies the input voltage signal to generate a rectified voltage signal. The first resistor couples between a first node point and second node point. The second resistor couples between the second node point and ground terminal. The third resistor couples between a third node point and ground terminal. The current mirror circuit outputs a reference current and charge current according to the rectified voltage signal and mode switching signal generated by the mode switching circuit. The buck converter outputs a first output voltage signal or second output voltage signal according to a first node point voltage.
Opening claim text (preview).
What is claimed is: 1. A wireless power system, configured to receive an input voltage signal from a first node of a secondary side coil, and charge a battery module according to the input voltage signal, comprising: an active rectifier, configured to receive the input voltage signal, and rectify the input voltage signal to generate a rectified voltage signal; a linear charger, comprising: a first resistor, coupled between a first node point and a second node point, wherein the battery module coupled with the first node point; a second resistor, coupled between the second node point and a ground terminal; a third resistor, coupled between a third node point and the ground terminal; a mode switching circuit, configured to generate a mode switching signal according to a second node point voltage of the second node point and a third node point voltage of the third node point; and a current mirror circuit, configured to output a reference current and a charge current to the third node point and the first node point, respectively, according to the rectified voltage signal and the mode switching signal; and a buck converter, coupled with the first node point, and configured to selectively output a first output voltage signal or a second output voltage signal according to a first node point voltage of the first node point, wherein the mode switching circuit comprises: a first operational amplifier, comprising a first input node, a second input node, and an output node, wherein the first input node of the first operational amplifier is coupled with the third node point, and the second input node of the first operational amplifier is configured to receive a first reference voltage; a second operational amplifier, comprising a first input node, a second input node, and an output node, wherein the first input node of the second operational amplifier is coupled with the second node point, and the second input node of the second operational amplifier is configured to receive the first reference voltage; a third transistor, comprising a first node, a second node, and a control node, wherein the first node of the third transistor is coupled with the output node of the first operational amplifier, and the control node of the third transistor is coupled with the output node of the second operational amplifier; and a fourth transistor, comprising a first node, a second node, and a control node, wherein the first node of the fourth transistor is coupled with the second node of the third transistor, the second node of the fourth transistor is coupled with the output node of the second operational amplifier, and the control node of the fourth transistor is coupled with the output node of the first operational amplifier. 2. The wireless power system of claim 1 , wherein when the second node point voltage is smaller than a predetermined voltage, the charge current has a fixed ratio with the reference current, and when the second node point voltage is larger than or equal to the predetermined voltage, the charge current is negatively correlated with the first node point voltage or the second node point voltage. 3. The wireless power system of claim 1 , wherein the current mirror circuit comprises: a first transistor, comprising a first node, a second node, and a control node, wherein the first node of the first transistor is configured to receive the rectified voltage signal, and the second node of the first transistor couples with the third node point; and a second transistor, comprising a first node, a second node, and a control node, wherein the first node of the second transistor is configured to receive the rectified voltage signal, and the second node of the second transistor couples with the first node point; wherein the control node of the first transistor and the control node of the second transistor are configured to receive the mode switching signal. 4. The wireless power system of claim 3 , wherein the current mirror circuit further comprises: a regulating transistor, comprising a first node, a second node, and a control node, wherein the first node of the regulating transistor is coupled with the second node of the first transistor, and the second node of the regulating transistor is coupled with the third node point; and a regulating operational amplifier, comprising a first input node, a second input node, and an output node, wherein the first input node of the regulating operational amplifier is coupled with the first node of the regulating transistor, the second input node of the regulating operational amplifier is coupled with the first node point, and the output node of the regulating operational amplifier is coupled with the control node of the regulating transistor. 5. The wireless power system of claim 1 , wherein the active rectifier comprises: a fifth transistor, comprising a first node, a second node, and a control node, wherein the first node of the fifth transistor is configured to provide the rectified voltage signal, the second node of the fifth transistor is coupled with the first node of the secondary side coil through a fourth node point and configured to receive the input voltage signal; a sixth transistor, comprising a first node, a second node, and a control node, wherein the first node of the sixth transistor is configured to provide the rectified voltage signal, the control node of the sixth transistor is coupled with the second node of the fifth transistor, the second node of the sixth transistor is coupled with the control node of the fifth transistor, and coupled with a second node of the secondary side coil through a fifth node point; a seventh transistor, comprising a first node, a second node, and a control node, wherein the first node of the seventh transistor is coupled with the fourth node point, and the second node of the seventh transistor is coupled with the ground terminal; an eighth transistor, comprising a first node, a second node, and a control node, wherein the first node of the eighth transistor is coupled with the fifth node point, and the second node of the eighth transistor is coupled with the ground terminal; a first capacitor, comprising a first node, and a second node, wherein the first node of the first capacitor is configured to receive the rectified voltage signal, and the second node of the first capacitor is coupled with a sixth node point; a second capacitor, coupled between the sixth node point and the ground terminal; and a control circuit, coupled with the control node of the seventh transistor and the control node of the eighth transistor, configured to receive a fourth node point voltage from the fourth node point, and receive a fifth node point voltage from the fifth node point, wherein the control circuit is configured to control the seventh transistor and the eighth transistor according to the fourth node point voltage and the fifth node point voltage. 6. The wireless power system of claim 5 , wherein when the fourth node point voltage is lower than a ground voltage, the control circuit switches the seventh transistor from a switch-off state to a conducted state, and when the fifth node point voltage is lower than the ground voltage, the control circuit switches the eighth transistor from the switch-off state to the conducted state. 7. The wireless power system of claim 5 , wherein the control circuit comprises: a first comparator, comprising a first input node, a second input node, and an output node, wherein the first input node of the first comparator is coupled with the ground terminal, the second input node of the first comparator is coupled with the fourth node point, and the output node of the first comparator is coupled with the control node of the seventh transistor; and a second comparator, co
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