Semiconductor device and method of manufacturing the same

Patent metadata

Field	Value
Publication number	US-11024566-B2
Application number	US-201916653127-A
Country	US
Kind code	B2
Filing date	Oct 15, 2019
Priority date	Nov 27, 2018
Publication date	Jun 1, 2021
Grant date	Jun 1, 2021

Abstract

A first semiconductor chip and a second semiconductor chip are stacked such that a first inductor and a second inductor face each other. An insulating sheet is disposed between the first semiconductor chip and the second semiconductor chip. The sealing member seals the first semiconductor chip, the second semiconductor chip, and the insulating sheet. The sealing member is disposed both between the insulating sheet and the first semiconductor chip and between the insulating sheet and the second semiconductor chip.

First claim

What is claimed is:

1. A semiconductor device comprising:
a first semiconductor chip including a first inductor;
a second semiconductor chip including a second inductor, the second semiconductor chip being stacked on the first semiconductor chip such that the second inductor faces the first inductor;
an insulating sheet disposed between the first semiconductor chip and the second semiconductor chip; and
a sealing member sealing the first semiconductor chip, the second semiconductor chip, and the insulating sheet,
wherein the sealing member is disposed between the insulating sheet and the first semiconductor chip and between the insulating sheet and the second semiconductor chip,
wherein the insulating sheet comprises:
a first portion positioned between the first semiconductor chip and the second semiconductor chip; and
a second portion bent with respect to the first portion, and

wherein the sealing member contacts both a first surface of the second portion in a first semiconductor chip side and a second surface of the second portion in a second semiconductor chip side.

2. The semiconductor device according to claim 1 ,
wherein the first semiconductor chip has a first protective layer covering the first inductor,
wherein the second semiconductor chip has a second protective layer covering the second inductor,
wherein a first outer peripheral edge of the first protective layer is located inside a first outermost peripheral edge of the first semiconductor chip, and
wherein a second outer peripheral edge of the second protective layer is located inside a second outermost peripheral edge of the second semiconductor chip.

3. The semiconductor device according to claim 2 , wherein the insulating sheet extends outward from at least one of the first outermost peripheral edge of the first semiconductor chip and the second outermost peripheral edge of the second semiconductor chip.

4. A semiconductor device comprising:
a first semiconductor chip including a first inductor;
a second semiconductor chip including a second inductor, the second semiconductor chip being stacked on the first semiconductor chip such that the second inductor faces the first inductor;
an insulating sheet disposed between the first semiconductor chip and the second semiconductor chip; and
a sealing member sealing the first semiconductor chip, the second semiconductor chip, and the insulating sheet,
wherein the sealing member is disposed between the insulating sheet and the first semiconductor chip and between the insulating sheet and the second semiconductor chip,
wherein the insulating sheet is bonded to the first semiconductor chip and the second semiconductor chip inside an opposing region where the first semiconductor chip and the second semiconductor chip face each other, and
wherein the insulating sheet is not bonded to both the first semiconductor chip and the second semiconductor chip outside the opposing region.

5. A semiconductor device comprising:
a first semiconductor chip including a first inductor;
a second semiconductor chip including a second inductor, the second semiconductor chip being stacked on the first semiconductor chip such that the second inductor faces the first inductor;
an insulating sheet disposed between the first semiconductor chip and the second semiconductor chip; and
a sealing member sealing the first semiconductor chip, the second semiconductor chip, and the insulating sheet,
wherein the sealing member is disposed between both the insulating sheet and the first semiconductor chip and between the insulating sheet and the second semiconductor chip, and
wherein the insulating sheet comprises:
a first portion; and
a second portion formed of material of a type other than the first portion.

6. The semiconductor device according to claim 5 , wherein a thermal expansion coefficient of the first portion and a thermal expansion coefficient of the second portion differ from each other.

Assignees

• Renesas Electronics Corp

Inventors

• Uchida Shinichi
• Ono Akio
• Kuwabara Shinichi
• Nakashiba Yasutaka

Classifications

• H10W72/874

  On different surfaces · CPC title

• H10W90/00

  Package configurations · CPC title

• H10W74/111 Primary

  the semiconductor body being completely enclosed · CPC title

• H10W72/50

  Bond wires · CPC title

• H10W72/30

  Die-attach connectors · CPC title