Interface circuitry with series switch and shunt attenuator

Patent metadata

Field	Value
Publication number	US-11018669-B2
Application number	US-201816767288-A
Country	US
Kind code	B2
Filing date	Mar 7, 2018
Priority date	Mar 7, 2018
Publication date	May 25, 2021
Grant date	May 25, 2021

Abstract

Methods, systems, and circuities for selectively connecting an RF signal to front end circuitry and selectively attenuating the RF signal are disclosed. In one example, an interface circuitry includes switching circuitry and attenuator circuitry. The switching circuitry is connected in series between an output of an amplifier and a front end circuitry configured to transmit a radio frequency (RF) signal output by the amplifier. The switching circuitry connects the output of the amplifier to a selected one or more front end circuitry inputs to create one or more signal paths. The attenuator circuitry is connected between the output of the amplifier and ground to create an attenuation path in a shunt configuration relative to the one or more signal paths. The attenuator circuitry is configured to attenuate the RF signal.

First claim

What is claimed is:

1. An interface circuitry, comprising:
a switching circuitry connected in series between an output of an amplifier and a front end circuitry configured to transmit a radio frequency (RF) signal output by the amplifier, wherein the switching circuitry connects the output of the amplifier to a selected one or more front end circuitry inputs to create one or more signal paths,
wherein the switching circuitry includes a metal oxide semiconductor field effect transistor (MOSFET) that is connected to the output of the amplifier via a drain node and connected to one of the one or more front end circuitry inputs via a source node;
a biasing network configured to use a control voltage to generate a drain voltage at the drain node of the MOSFET, the drain voltage being equal to an amplitude of the RF signal such that a body and a gate of the MOSFET have an AC floating configuration; and
an attenuator circuitry connected between the output of the amplifier and ground to create an attenuation path in a shunt configuration relative to the one or more signal paths,
the attenuator circuitry being configured to attenuate the RF signal.

2. The interface circuitry of claim 1 , wherein the switching circuitry comprises two or more switch circuitries, each one of the two or more switch circuitries forming a respective connection between the amplifier and a selected one of the one or more front end circuitry inputs.

3. The interface circuitry of claim 1 , wherein the biasing network is configured to generate a source voltage at a source node of the MOSFET that is equal to the drain voltage.

4. The interface circuitry of claim 1 , wherein the switching circuitry further comprises a feedforward capacitor connected between the drain node and a body node of the MOSFET.

5. The interface circuitry of claim 1 , wherein the switching circuitry further comprises a first blocking capacitor connected between the output of the amplifier and the drain node, and a second blocking capacitor connected between the source node and the one of the one or more front end circuitry inputs.

6. The interface circuitry of claim 1 , wherein the attenuator circuitry comprises:
a first attenuator circuitry MOSFET connected to the output of the amplifier by a drain node;
another biasing network configured to generate, for the first attenuator circuitry MOSFET, a first drain voltage, a first gate voltage, a first body voltage, and a first source voltage from an attenuator circuitry control voltage,
wherein respective amplitudes of the first drain voltage, the first gate voltage, the first body voltage, and the first source voltage are equal to an amplitude of the RF signal; and
an attenuator capacitor connected between the output of the amplifier and the drain node of the first attenuator circuitry MOSFET.

7. The interface circuitry of claim 6 , wherein the attenuator circuitry further comprises:
a second attenuator circuitry MOSFET connected by a drain node to a source node of the first attenuator circuitry MOSFET and connected by a source node to ground,
wherein the another biasing network is configured to generate, for the second attenuator circuitry MOSFET, a second drain voltage, a second gate voltage, a second body voltage, and a second source voltage from the attenuator circuitry control voltage,
wherein respective amplitudes of the second drain voltage, the second gate voltage, the second body voltage, and the second source voltage are equal to an amplitude of the RF signal.

8. The interface circuitry of claim 1 , further comprising:
a second attenuator circuitry connected between the output of the amplifier and ground to create a second attenuation path in a shunt configuration relative to the one or more signal paths, and
wherein the second attenuator circuitry is configured to attenuate the RF signal.

9. The interface circuitry of claim 1 , further comprising a control circuitry configured to generate the control voltage and to provide the control voltage to the biasing network.

10. A method to selectively route and attenuate a radio frequency (RF) signal from a RF amplifier to a front end circuitry having one or more front end circuitry inputs, comprising:
providing one or more signal paths, each respective one of the one or more signal paths being in series with an output of the amplifier and the front end circuitry, each respective one of the signal paths being configured to conduct the RF signal;
wherein providing the one or more signal paths comprises providing a switching circuitry connected in series between the RF amplifier and the one or more front end circuitry inputs, the switching circuitry including a metal oxide semiconductor field effect transistor (MOSFET) that is connected to the output of the RF amplifier via a drain node and connected to one of the one or more front end circuitry inputs via a source node;
controlling each signal path by controlling the switching circuitry to connect or disconnect the RF amplifier to a selected one of the one or more front end circuitry inputs to create a respective one of the one or more signal paths,
wherein controlling each signal path comprises generating, via a biasing network using a control voltage, a drain voltage at the drain node of the MOSFET, the drain voltage being equal to an amplitude of the RF signal such that a body and a gate of the MOSFET have an AC floating configuration;
providing an attenuation path connected between the output of the amplifier and ground in a shunt configuration relative to the one or more signal paths; and
controlling the attenuation path to selectively attenuate the RF signal.

11. The method of claim 10 , wherein the switching circuitry comprises two or more switch circuitries forming a respective connection between the RF amplifier and a selected one of the one or more front end circuitry inputs,
wherein controlling each signal path comprises generating the drain voltage, a source voltage, and a gate voltage for each MOSFET in each respective one of the two or more switch circuitries to open or close an associated one of the one or more signal paths.

12. The method of claim 11 , further comprising generating the drain voltage as equal to the source voltage for each MOSFET in each respective one of the two or more switch circuitries.

13. The method of claim 11 , further comprising, for each respective one of the two or more switch circuitries, providing a low-impedance path including a feedforward capacitor connected between the drain node and a body node of each respective MOSFET.

14. The method of claim 10 , wherein:
providing the attenuation path comprises providing an attenuator circuitry connected between the output of the RF amplifier and ground, wherein the attenuator circuitry is configured to attenuate the RF signal.

15. The method of claim 14 , wherein the attenuator circuitry comprises:
a first attenuator circuitry MOSFET connected to the output of the RF amplifier by a drain node;
another biasing network configured to generate, for the first attenuator circuitry MOSFET, a first drain voltage, a first gate voltage, a first body voltage, and a first source voltage from an attenuator circuitry control voltage, wherein respective amplitudes of the first drain voltage, the first gate voltage, the first body voltage, and the first source voltage are equal to an amplitude of the RF signal; and
an attenuator capacitor connected between the output of the RF amplifier and the drain node of the first attenuator circuitry MOSFET,
wherein controlling the attenuation path comprises generating the first drain voltage, the

Assignees

• Intel Ip Corp

Inventors

• Eschbaumer Maximilian

Classifications

• H03F2200/451

  the amplifier being a radio frequency amplifier · CPC title

• H03F2200/421

  Multiple switches coupled in the output circuit of an amplifier are controlled by a circuit · CPC title

• H03F2200/396

  the output of an amplifier can be switched on or off by a switch to couple the output signal to a load · CPC title

• H03F3/245

  with semiconductor devices only · CPC title

• H03F3/195

  in integrated circuits · CPC title