Battery cell management system

US11018513B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11018513-B2
Application numberUS-201816028092-A
CountryUS
Kind codeB2
Filing dateJul 5, 2018
Priority dateJul 31, 2017
Publication dateMay 25, 2021
Grant dateMay 25, 2021

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A battery cell management system includes a microcontroller having first and second applications and first and second memory buffers. The first and second memory buffers have first and second overvoltage fault bits, respectively, associated with a first battery cell. The first application sets a first encoded overvoltage fault indicator equal to a first fault value if the first overvoltage fault bit of the first memory buffer is equal to a first binary value. The first application receives a second encoded overvoltage fault indicator from the second application. The first application commands a digital input-output device to generate control signals to transition a contactor to an open operational state if either the first encoded overvoltage fault indicator is equal to the first fault value or the second encoded overvoltage fault indicator is equal to a second fault value.

First claim

Opening claim text (preview).

What is claimed is: 1. A battery cell management system, comprising: a microcontroller having a microprocessor and first and second memory buffers, the microprocessor having first and second applications; the first memory buffer having a first overvoltage fault bit associated with a first battery cell; the second memory buffer having a second overvoltage fault bit associated with the first battery cell; the first application setting a first encoded overvoltage fault indicator equal to a first fault value if the first overvoltage fault bit of the first memory buffer is equal to a first binary value; the second application setting a second encoded overvoltage fault indicator equal to the second fault value if the second overvoltage fault bit of the second memory buffer is equal to the first binary value; the first application receiving the second encoded overvoltage fault indicator associated with the second overvoltage fault bit from the second application; the second application receiving the first encoded overvoltage fault indicator from the first application; the first application commanding a digital input-output device to generate control signals to transition a contactor to an open operational state if either the first encoded overvoltage fault indicator is equal to the first fault value or the second encoded overvoltage fault indicator is equal to a second fault value, the first fault value having a Hamming distance of at least four from the second fault value; and the second application commanding the digital input-output device to generate control signals to transition the contactor to the open operational state if either the first encoded overvoltage fault indicator is equal to the first fault value or the second encoded overvoltage fault indicator is equal to the second fault value. 2. The battery cell management system of claim 1 , further comprising: a battery cell voltage measurement IC determining whether a voltage being output by the first battery cell is greater than a threshold voltage indicating an overvoltage condition; the battery cell voltage measurement IC setting the first overvoltage fault bit equal to the first binary value if the voltage being output by the first battery cell is greater than the threshold voltage; and the battery cell voltage measurement IC sending a message having the first overvoltage fault bit to the microcontroller. 3. The battery cell management system of claim 2 , wherein: the microcontroller copying the first overvoltage fault bit from the message to the first memory buffer; and the microcontroller copying the first overvoltage fault bit from the message to the second memory buffer. 4. The battery cell management system of claim 1 , wherein: the microcontroller having third and fourth applications; the first memory buffer having a third overvoltage fault bit associated with a second battery cell; the second memory buffer having a fourth overvoltage fault bit associated with the second battery cell; the third application setting a third encoded overvoltage fault indicator equal to a third fault value if the third overvoltage fault bit of the first memory buffer is equal to the first binary value; the third application receiving a fourth encoded overvoltage fault indicator associated with the fourth overvoltage fault bit from the fourth application; and the third application commanding the digital input-output device to generate control signals to transition the contactor to the open operational state if either the third encoded overvoltage fault indicator is equal to the third fault value or the fourth encoded overvoltage fault indicator is equal to a fourth fault value, the third fault value having a Hamming distance of at least four from the fourth fault value. 5. The battery cell management system of claim 4 , wherein: the fourth application setting the fourth encoded overvoltage fault indicator equal to the fourth fault value if the fourth overvoltage fault bit of the second memory buffer is equal to the first binary value; the fourth application receiving the third encoded overvoltage fault indicator from the third application; and the fourth application commanding the digital input-output device to generate control signals to transition the contactor to the open operational state if either the third encoded overvoltage fault indicator is equal to the third fault value or the fourth encoded overvoltage fault indicator is equal to the fourth fault value.

Assignees

Inventors

Classifications

  • including monitoring or indicating arrangements · CPC title

  • against overvoltage · CPC title

  • Active balancing, e.g. using capacitor-based, inductor-based or DC-DC converters · CPC title

  • Passive balancing, e.g. using resistors or parallel MOSFETs · CPC title

  • acting upon multiple batteries simultaneously or sequentially · CPC title

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Frequently asked questions

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What does patent US11018513B2 cover?
A battery cell management system includes a microcontroller having first and second applications and first and second memory buffers. The first and second memory buffers have first and second overvoltage fault bits, respectively, associated with a first battery cell. The first application sets a first encoded overvoltage fault indicator equal to a first fault value if the first overvoltage faul…
Who is the assignee on this patent?
Lg Chemical Ltd
What technology area does this patent fall under?
Primary CPC classification H01M10/425. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue May 25 2021 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).