Display substrate and manufacturing method thereof, display apparatus

US11018166B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11018166-B2
Application numberUS-201615521408-A
CountryUS
Kind codeB2
Filing dateFeb 16, 2016
Priority dateSep 9, 2015
Publication dateMay 25, 2021
Grant dateMay 25, 2021

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

The present disclosure provides a display substrate and a manufacturing method thereof, and a display apparatus, the manufacturing method comprises: forming a base; forming a thin film transistor on the base, the thin film transistor comprises a gate, a source, a drain and an active layer, a first insulating layer is formed on the base, and a second insulating layer is formed between the gate and the active layer, the active layer is formed in the first insulating layer; forming a third insulating layer above the thin film transistor; forming a pixel electrode above the third insulating layer; forming a fourth insulating layer above the pixel electrode, a material of at least one of the base, the first insulating layer, the second insulating layer, the third insulating layer and the fourth insulating layer includes an organic material, and a material of at least one of them includes an inorganic material.

First claim

Opening claim text (preview).

The invention claimed is: 1. A manufacturing method of a display substrate, comprising steps of: forming a base; forming a thin film transistor on the base, wherein, the thin film transistor comprises a gate, a source, a drain and an active layer, a first insulating layer is formed on the base, and a second insulating layer is formed between the gate and the active layer, the active layer is formed in the first insulating layer; forming a third insulating layer above the thin film transistor; forming a pixel electrode above the third insulating layer; forming a fourth insulating layer above the pixel electrode, wherein a material of at least one of the first insulating layer, the second insulating layer, the third insulating layer and the fourth insulating layer includes an inorganic material, wherein the step of forming the base comprises: forming first bulges corresponding to patterns of the source and the drain respectively on a base substrate; forming a polydimethylsilane layer, which is hydroxyl-functionalized, on the base substrate, so that first grooves corresponding to patterns of the source and the drain are respectively formed at positions corresponding to the first bulges in a surface of the polydimethylsilane layer proximal to the base substrate; after forming the first grooves in the polydimethylsilane layer, stripping off the polydimethylsilane layer from the base substrate to form the base. 2. The manufacturing method of claim 1 , wherein the step of forming the source and the drain comprises: coating octadecyltrichlorosilane on a glass substrate; contacting a surface of the glass substrate coated with the octadecyltrichlorosilane with a surface of the base formed with the first grooves; removing the glass substrate, and coating hydrophilic solution containing conductive material on the base, so that the source and the drain are formed in the first grooves, respectively. 3. The manufacturing method of claim 1 , wherein the step of forming the fourth insulating layer comprises: forming the fourth insulating layer on the pixel electrode by at least one material of polydimethylsilane, polyimide, polymethyl methacrylate and polyvinyl pyrrolidone. 4. A manufacturing method of a display substrate, comprising steps of: forming a base; forming a thin film transistor on the base, wherein, the thin film transistor comprises a gate, a source, a drain and an active layer, a first insulating layer is formed on the base, and a second insulating layer is formed between the gate and the active layer, the active layer is formed in the first insulating layer; forming a third insulating layer above the thin film transistor; forming a pixel electrode above the third insulating layer; forming a fourth insulating layer above the pixel electrode, wherein the step of forming the thin film transistor comprises: forming a polydimethylsilane layer on the base to form the first insulating layer; irradiating light or performing an oxidation process on an upper surface of the first insulating layer so that a first silicon dioxide layer is formed on the upper surface of the first insulating layer; etching the first silicon dioxide layer and the first insulating layer to form a via hole corresponding to a pattern of the active layer; coating hydrophilic solution containing semi-conductive material on the first silicon dioxide layer to form the active layer in the via hole. 5. The manufacturing method of claim 4 , wherein the step of forming the fourth insulating layer comprises: forming the fourth insulating layer on the pixel electrode by at least one material of polydimethylsilane, polyimide, polymethyl methacrylate and polyvinyl pyrrolidone. 6. A manufacturing method of a display substrate, comprising steps of: forming a base; forming a thin film transistor on the base, wherein, the thin film transistor comprises a gate, a source, a drain and an active layer, a first insulating layer is formed on the base, and a second insulating layer is formed between the gate and the active layer, the active layer is formed in the first insulating layer; forming a third insulating layer above the thin film transistor; forming a pixel electrode above the third insulating layer; forming a fourth insulating layer above the pixel electrode, wherein a material of at least one of the base, the first insulating layer, the third insulating layer and the fourth insulating layer includes an inorganic material, wherein the step of forming the thin film transistor comprises: forming a polydimethylsilane layer on the first insulating layer to form the second insulating layer; etching the second insulating layer to form a second groove corresponding to a pattern of the gate; coating octadecyltrichlorosilane on a glass substrate; contacting a surface of the glass substrate coated with the octadecyltrichlorosilane with a surface of the second insulating layer formed with the second groove; removing the glass substrate, and coating hydrophilic solution containing conductive material on the second insulating layer to form the gate in the second groove. 7. The manufacturing method of claim 6 , wherein the step of forming the fourth insulating layer comprises: forming the fourth insulating layer on the pixel electrode by at least one material of polydimethylsilane, polyimide, polymethyl methacrylate and polyvinyl pyrrolidone.

Assignees

Inventors

Classifications

  • characterised by the compositions or shapes of the interlayer dielectrics · CPC title

  • comprising semiconductor materials not belonging to the Group IV, e.g. InGaZnO · CPC title

  • characterised by materials, geometry or structure of the substrates · CPC title

  • comprising manufacture, treatment or coating of substrates · CPC title

  • wherein the TFTs are in active matrices · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US11018166B2 cover?
The present disclosure provides a display substrate and a manufacturing method thereof, and a display apparatus, the manufacturing method comprises: forming a base; forming a thin film transistor on the base, the thin film transistor comprises a gate, a source, a drain and an active layer, a first insulating layer is formed on the base, and a second insulating layer is formed between the gate a…
Who is the assignee on this patent?
Boe Technology Group Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10D86/0241. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue May 25 2021 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).