Data operating method, device, and system

Patent metadata

Field	Value
Publication number	US-11010056-B2
Application number	US-201916415940-A
Country	US
Kind code	B2
Filing date	May 17, 2019
Priority date	May 21, 2014
Publication date	May 18, 2021
Grant date	May 18, 2021

Abstract

A data operating method, device, and system are provided and relate to the computer field, so as to resolve a prior-art problem of low efficiency of performing a data operation on a block device by a CPU. The method includes: receiving an operation instruction sent by a CPU; when the operation instruction is a read instruction, reading a first data block in the block device and returning to-be-read data in the first data block to the CPU; or when the operation instruction is a write instruction, writing, into a cache, to-be-written data indicated by the write instruction, and writing, into the block device, a second data block that includes the to-be-written data. The method is used to operate data in a block device.

First claim

What is claimed is:

1. A data operating method performed by a storage control device, the method comprising:
receiving a read instruction instructing the storage control device to perform a data read operation on a block device;
reading a data block from the block device, the data block comprising to-be-read data and additional data other than the to-be-read data;
writing the data block into a cache of the storage control device; and
returning the to-be-read data to a processor;
receiving an additional read instruction instructing the storage device to perform an additional data read operation;
determining that an operation object of the additional read instruction is a character device according to a physical address from which the additional read instruction instructs the additional data read operation to be performed; and
sending the additional read instruction to the character device.

2. The method according to claim 1 , wherein:
reading the data block from the block device comprises
obtaining, from the read instruction, read address information of the to-be-read data in the block device, and
reading the data block corresponding to the read address information from the block device; and

returning the to-be-read data in the data block to the processor comprises
extracting the to-be-read data from the data block in the cache, and
returning the to-be-read data to the processor.

3. The method according to claim 1 , wherein the to-be-read data does not meet a block granularity condition for performing data interaction with the block device.

4. The method according to claim 1 , wherein a total size of the to-be-read data is less than 512 bytes, and wherein a block granularity of the block device is greater than or equal to 512 bytes.

5. The method according to claim 1 , wherein a total size of the to-be-read data is less than is less than a total size of the data block, the total size of the data block being equal to a block granularity of the block device.

6. The method according to claim 1 , wherein reading the data block from the block device comprises:
determining that an operation object of the read instruction is the block device according to a physical address from which the read instruction instructs the data read operation to be performed; and
reading the data block from the block device.

7. A storage control device, comprising:
a cache configured to cache data;
a memory configured to store instructions; and
a first processor coupled to the memory and configured to execute the instructions to
receive a read instruction instructing the storage control device to perform a data read operation on a block device,
read a data block from the block device, the data block comprising to-be-read data and additional data other than the to-be-read data,
write the data block into the cache of the storage control device, and
return the to-be-read data to a second processor;

receive an additional read instruction instructing the storage device to perform an additional data read operation;
determine that an operation object of the additional read instruction is a character device according to a physical address from which the additional read instruction instructs the additional data read operation to be performed; and
send the additional read instruction to the character device.

8. The device according to claim 7 , wherein the first processor is further configured to execute the instructions to:
obtain read address information of the to-be-read data in the block device from the read instruction; and
read the data block corresponding to the read address information from the block device; and
extract the to-be-read data from the data block in the cache.

9. The device according to claim 7 , wherein the to-be-read data does not meet a block granularity condition for performing data interaction with the block device.

10. The device according to claim 7 , wherein a total size of the to-be-read data is less than 512 bytes, and wherein a block granularity of the block device is greater than or equal to 512 bytes.

11. The device according to claim 7 , wherein a total size of the to-be-read data is less than is less than a total size of the data block, the total size of the data block being equal to a block granularity of the block device.

12. The device according to claim 7 , wherein the first processor is further configured to execute the instructions to:
determine that an operation object of the read instruction is the block device according to a physical address from which the read instruction instructs the data read operation to be performed; and
read the data block from the block device.

13. A system, comprising:
a processor configured to send a read instruction; and
a storage control device configured to
receive the read instruction sent by the processor, the read instruction instructing the storage control device to perform a data read operation on a block device,
read a data block from the block device, the data block comprising to-be-read data and additional data other than the to-be-read data,
write the data block into a cache of the storage control device,
return the to-be-read data to the processor;

receive an additional read instruction instructing the storage device to perform an additional data read operation;
determine that an operation object of the additional read instruction is a character device according to a physical address from which the additional read instruction instructs the additional data read operation to be performed; and
send the additional read instruction to the character device.

14. The system according to claim 13 , wherein the storage control device is further configured to:
obtain read address information of the to-be-read data in the block device from the read instruction;
read the data block corresponding to the read address information from the block device; and
extract the to-be-read data from the data block in the cache.

15. The system according to claim 13 , wherein the to-be-read data does not meet a block granularity condition for performing data interaction with the block device.

16. The system according to claim 13 , wherein a total size of the to-be-read data is less than a total size of the data block, the total size of the data block being equal to a block granularity of the block device.

17. The system according to claim 13 , wherein the storage control device is further configured to:
determine that an operation object of the read instruction is the block device according to a physical address from which the read instruction instructs the data read operation to be performed; and
read the data block from the block device.

Assignees

• Huawei Tech Co Ltd

Inventors

• Xia Fei
• Chen Mingyu
• Jiang Dejun
• Xiong Jin

Classifications

• G06F12/121

  using replacement algorithms · CPC title

• G06F3/061 Primary

  Improving I/O performance · CPC title

• G06F2212/312

  In storage controller · CPC title

• G06F3/0659

  Command handling arrangements, e.g. command buffers, queues, command scheduling · CPC title

• G06F3/0673

  Single storage device · CPC title