Display panel and display device including the same

US10997888B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10997888-B2
Application numberUS-201916573098-A
CountryUS
Kind codeB2
Filing dateSep 17, 2019
Priority dateApr 26, 2019
Publication dateMay 4, 2021
Grant dateMay 4, 2021

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A display panel has a display area and a non-display area surrounding the display area. The display area has a first side and a second side opposite to the first side, and includes: a hollow area having first and second edges; and first to third display areas. The display panel includes: a driving chip arranged in the non-display area closer to the first side than to the second side; first data lines arranged in the first display area; second data lines arranged in the second display area; and third data lines arranged in the third display area. The first edge is closer to the driving chip than the second edge. At least one or more of the first data lines is connected to corresponding one or more of the second data lines through a switch unit.

First claim

Opening claim text (preview).

What is claimed is: 1. A display panel, having a display area and a non-display area surrounding the display area, wherein the display area has a first side and a second side opposite to the first side, and the display area comprises: a hollow area having a first edge and a second edge; a first display area extending from the first side of the display area to the second side of the display area; a second display area extending from the second edge of the hollow area to the second side of the display area; and a third display area extending from the first side of the display area to the first edge of the hollow area, wherein the display panel comprises: a driving chip arranged in the non-display area closer to the first side of the display area than to the second side of the display area; first data lines arranged in the first display area; second data lines arranged in the second display area; and third data lines arranged in the third display area, wherein the first edge of the hollow area is closer to the driving chip than the second edge of the hollow area, and wherein at least one or more of the first data lines is connected to corresponding one or more of the second data lines through a switch unit, and the switch unit is configured to transmit a data signal through the first data line to the second data line in a time division manner. 2. The display panel according to claim 1 , further comprising compensation capacitors connected to the third data lines, wherein each of the compensation capacitors has a capacitance of C 1 , a difference between a parasitic capacitance of each of the first data lines and a parasitic capacitance of each of the third data lines is C 2 , and 0.8*C 2 ≤C 1 ≤1.2*C 2 ; the compensation capacitors are arranged at the first edge of the hollow area close to the third display area. 3. The display panel according to claim 2 , wherein first connection lines are arranged between the first data lines and the second data lines, each of the first connection lines connects one first data line of the first data lines with a respective one of the second data lines connected to the one first data line, one of the first connection lines that connects one of the first data lines with a respective one of the second data lines that are close to a junction of the first display area and the second display area has a larger resistance than another of the first connection lines that connects another of the first data lines with a respective one of the second data lines that are away from the junction of the first display area and the second display area. 4. The display panel according to claim 1 , wherein the switch unit comprises at least one switch transistor, and each of the at least one switch transistor has a first electrode connected to a respective one of the first data lines, a second electrode connected to a respective one of the second data lines, and a gate electrode connected to a same control signal line. 5. The display panel according to claim 4 , wherein the first data lines comprise a first set of first data lines and a second set of first data lines, a first data line in the first set of first data lines and a first data line in the second set of first data lines are alternately arranged in a first direction intersecting with an extending direction of the first data lines, and the first set of first data lines and the second set of first data lines are connected to pixels of different colors; the second data lines comprise a first set of second data lines and a second set of second data lines, a second data line in the first set of second data lines and a second data line in the second set of second data lines are alternately arranged in the first direction, and the first set of second data lines and the second set of second data lines are connected to pixels of different colors; a second data line in the first set of second data lines is correspondingly connected to a corresponding first data line in the first set of first data lines through the at least one switch transistor, and the second set of second data lines are connected to the second set of first data lines through the at least one switch transistors; and the first set of second data lines and the first set of first data lines are connected to pixels of a same color; and the second set of second data lines and the second set of first data lines are connected to pixels of a same color. 6. The display panel according to claim 1 , wherein the switch unit comprises at least one multi-path switch unit, and each of the at least one multi-path switch unit comprises n transistors and n control signal lines; and one of the first data lines is connected to n second data lines of the second data lines through a respective multi-path switch unit of the at least one multi-path switch unit; and each of the n transistors has a first terminal connected to a same one of the first data lines, a second terminal connected to a respective one of the second data lines, and a control terminal connected to a respective one of the n control signal lines, where n is an integer greater than or equal to 2. 7. The display panel according to claim 6 , wherein the first data lines comprise a first set of first data lines and a second set of first data lines alternately arranged in a first direction intersecting with an extending direction of the first data lines, and the first set of first data lines and the second set of first data lines are connected to pixels of different colors; the second data lines comprise a first set of second data lines and a second set of second data lines alternately arranged in the first direction, and the first set of second data lines and the second set of second data lines are connected to pixels of different colors; n second data lines of the first set of second data lines are connected to a respective one first data line of the first set of first data lines through a respective multi-path switch unit of the at least one multi-path switch unit, and n second data lines of the second set of second data lines are connected to a respective one first data line of the second set of first data lines through a respective multi-path switch unit of the at least one multi-path switch unit; and the first set of second data lines and the first set of first data lines are connected to pixels of a same color, and the second set of second data lines and the second set of first data lines are connected to pixels of a same color. 8. The display panel according to claim 1 , wherein the display panel is a flexible display panel, the second side of the display area is provided with a bent portion, the switch unit is arranged at the bent portion, and the bent portion is folded to a non-light-exiting surface of the display panel. 9. The display panel according to claim 1 , wherein the display area further has a third side adjacent to the first side and the second side of the display area, and a fourth side opposite to the third side; and the hollow area is arranged at the third side. 10. The display panel according to claim 1 , wherein the display area further has a third side adjacent to the first side and the second side of the display area, and a fourth side opposite to the third side; the hollow area is arranged in a middle area of the display area to form a non-display hole; and a third set of first data lines is provided at a first side of the non-display hole, a fourth set of first data lines is provided at a second side of the non-display hole; and the third set of first data lines and the fourth set of first data lines are correspondingly connected to the second data lines through the switch unit respectively; and the first s

Assignees

Inventors

Classifications

  • characterised by materials, geometry or structure of the substrates · CPC title

  • wherein the TFTs are in active matrices · CPC title

  • Geometry or disposition of pixel elements, address lines or gate electrodes · CPC title

  • Flexible displays · CPC title

  • Arrangement of drivers for different directions of scanning · CPC title

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Frequently asked questions

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What does patent US10997888B2 cover?
A display panel has a display area and a non-display area surrounding the display area. The display area has a first side and a second side opposite to the first side, and includes: a hollow area having first and second edges; and first to third display areas. The display panel includes: a driving chip arranged in the non-display area closer to the first side than to the second side; first data…
Who is the assignee on this patent?
Shanghai Tianma Am Oled Co Ltd
What technology area does this patent fall under?
Primary CPC classification G09G3/20. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue May 04 2021 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).