Power management in a multiple-processor computing device

Patent metadata

Field	Value
Publication number	US-10996725-B2
Application number	US-201816108006-A
Country	US
Kind code	B2
Filing date	Aug 21, 2018
Priority date	Aug 21, 2018
Publication date	May 4, 2021
Grant date	May 4, 2021

Abstract

A method for managing power in a multiple processor computing device includes detecting a first amount of power being used by a first processor of the computing device; determining an amount of extra power available based on the first amount of power and a power budget for the first processor; and transmits a value to a driver associated with a second processor of the computing device, wherein the value indicates the amount of extra power available, wherein the driver adjusts at least one operating parameter of the second processor based on the amount of extra power available.

First claim

What is claimed is:

1. A method for managing power in a multiple processor computing device, the method comprising:
detecting a first average amount of power [being] used by a first processor of the computing device over a recent time interval;
determining an amount of extra power available based on the first average amount of power and a power budget for the first processor; and
transmitting a value to a driver associated with a second processor of the computing device, wherein the value indicates the amount of extra power available,
wherein the driver adjusts at least one operating parameter of the second processor based on the amount of extra power available.

2. The method of claim 1 , wherein detecting the first average amount of power being used by the first processor comprises polling a register of the first processor.

3. The method of claim 1 , wherein determining the amount of extra power available is further based on a second amount of power being used by at least one other component of the computing device and a power budget for the at least one other component.

4. The method of claim 1 , wherein the driver associated with the second processor is configured to cause the second processor to overclock when a current power use of at least one other component of the computing device is less than a power budget for the at least one other component.

5. The method of claim 1 , wherein the driver causes the second processor to overclock when the amount of extra power available is greater than zero.

6. The method of claim 1 , wherein the at least one operating parameter of the second processor comprises a clock speed of the second processor.

7. A non-transitory computer-readable storage medium including instructions that, when executed by one or more processors, configure the one or more processors to perform the steps of:
detecting a first average amount of power [being] used by a first processor of the computing device over a recent time interval;
determining an amount of extra power available based on the first average amount of power and a power budget for the first processor; and
transmitting a value to a driver associated with a second processor of the computing device, wherein the value indicates the amount of extra power available,
wherein the driver adjusts at least one operating parameter of the second processor based on the amount of extra power available.

8. The non-transitory computer-readable storage medium of claim 7 , wherein detecting the first average amount of power being used by the first processor comprises polling a register of the first processor.

9. The non-transitory computer-readable storage medium of claim 7 , wherein determining the amount of extra power available is further based on a second amount of power being used by at least one other component of the computing device and a power budget for the at least one other component.

10. The non-transitory computer-readable storage medium of claim 7 , wherein the driver causes the second processor to overclock when the amount of extra power available is greater than zero.

11. The non-transitory computer-readable storage medium of claim 7 , wherein the instructions are included in a system-level driver of a computing device.

12. The non-transitory computer-readable storage medium of claim 7 , wherein the system-level driver of the computing device is coupled to an advanced configuration and power interface of the computing device.

13. The non-transitory computer-readable storage medium of claim 7 , wherein the at least one operating parameter of the second processor comprises a clock speed of the second processor.

14. The non-transitory computer-readable storage medium of claim 7 , wherein the driver associated with the second processor is configured to cause the second processor to overclock when a current power use of at least one other component of the computing device is less than a power budget for the at least one other component.

15. A computing device, comprising:
a first processor coupled to a printed circuit board;
a second processor coupled to the printed circuit board; and
a controller that:
detects a first average amount of power used by the first processor over a recent time interval;
determines an amount of extra power available based on the first average amount of power and a power budget for the first processor; and
transmits a value to a driver associated with the second processor, wherein the value indicates the amount of extra power available,

wherein the driver adjusts at least one operating parameter of the second processor based on the amount of extra power available.

16. The computing device of claim 15 , wherein determining the amount of extra power available is further based on a second amount of power being used by at least one other component of the computing device and a power budget for the at least one other component.

17. The computing device of claim 15 , wherein the driver associated with the second processor is configured to cause the second processor to overclock when a current power use of at least one other component of the computing device is less than a power budget for the at least one other component.

18. The computing device of claim 16 , wherein the at least one other component of the computing device comprises at least one of a display device, a keyboard, a touchpad, a networking interface, a hard disk drive, a solid-state drive, a cooling fan, and a memory chip.

19. The computing device of claim 15 , wherein the controller is included in a system-level driver of the computing device.

20. The computing device of claim 19 , further comprising an advanced configuration and power interface that is coupled to the system-level driver of the computing device.

Assignees

• Nvidia Corp

Inventors

• Li Sau Yan Keith
• Dewey Thomas E
• Chen Arthur
• Lai Simon
• Pabalkar Amit
• Nayak Santosh

Classifications

• G06F1/08

  Clock generators with changeable or programmable clock frequency · CPC title

• G06F1/324

  by lowering clock frequency · CPC title

• G06F9/5027

  the resource being a machine, e.g. CPUs, Servers, Terminals · CPC title

• G06F9/4411

  Configuring for operating with peripheral devices; Loading of device drivers · CPC title

• G06F1/3206 Primary

  Monitoring of events, devices or parameters that trigger a change in power modality · CPC title