Systems and devices with common mode noise suppression structures and methods

US10992346B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10992346-B2
Application numberUS-201414225764-A
CountryUS
Kind codeB2
Filing dateMar 26, 2014
Priority dateMar 26, 2014
Publication dateApr 27, 2021
Grant dateApr 27, 2021

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

An embodiment of a transformer-based system or galvanic isolation device includes a first coil, a second coil aligned with the first coil across a gap, and a first capacitor coupled between the first coil and a first voltage reference. A first electrode of the first capacitor may be formed from a conductive electrode structure that is electrically isolated from the first coil, and a second electrode of the first capacitor may be formed from at least a portion of the first coil. The system or device also may include a second capacitor coupled between the second coil and a second voltage reference. The first and second coils may form portions of first and second IC die, respectively, and the system or device may also include one or more dielectric components within the gap between the IC die, where the dielectric component(s) are positioned directly between the first and second coils.

First claim

Opening claim text (preview).

What is claimed is: 1. A device comprising: a first integrated circuit (IC) die that includes: a first IC substrate having a first IC substrate surface; a first build-up structure connected to the first IC substrate surface, wherein the first build-up structure includes a plurality of parallel first alternating conductive layers and dielectric layers formed on the first IC substrate surface, wherein the plurality of first alternating conductive and dielectric layers has a first exterior surface; a first coil formed from portions of a first set of conductive layers of the plurality of first alternating conductive and dielectric layers, wherein first and second terminals of the first coil are configured to be electrically coupled to first communication circuitry; and a first capacitor that includes a first electrode formed from a portion of the first coil, a second electrode formed from a second conductive layer of the plurality of first alternating conductive and dielectric layers, and first dielectric material between the first set of conductive layers and the second conductive layer that electrically isolates the first electrode and the second electrode from each other, wherein the second electrode includes a plurality of conductive fingers that extend across the first coil outwardly from a location that is vertically offset from a center of the first coil so that the first coil and the plurality of conductive fingers are capacitively coupled, and wherein the second electrode is electrically coupled to a voltage reference of the first IC die. 2. The device of claim 1 , wherein the first capacitor has a capacitance value in a range of 10 femtofarad (fF) to 1000 fF. 3. The device of claim 1 , wherein the first set of conductive layers is proximate to the exterior surface, and wherein the second conductive layer is positioned between the first IC substrate surface and the first set of conductive layers. 4. The device of claim 1 , wherein the second electrode comprises; a conductive inner ring that is vertically offset from the center of the first coil; and the plurality of conductive fingers connected to and extending outwardly from the conductive inner ring. 5. The device of claim 4 , wherein the conductive inner ring includes a gap. 6. The device of claim 1 , further comprising: a second IC die that includes: a second IC substrate having a second IC substrate surface, a second build-up structure connected to the second IC substrate surface, wherein the second build-up structure includes a plurality of second alternating conductive layers and dielectric layers formed on the second IC substrate surface, wherein the plurality of second alternating conductive and dielectric layers has a second exterior surface, a second coil formed from portions of a first set of conductive layers of the plurality of second alternating conductive and dielectric layers, and a second capacitor that includes a third electrode formed from at least a portion of the second coil, a fourth electrode formed from a portion of a second set of conductive layers of the plurality of second alternating conductive and dielectric layers, and second dielectric material that electrically isolates the third electrode and the fourth electrode from each other, wherein the first IC die and the second IC die are arranged within the device so that the first exterior surface of the first IC die faces the second exterior surface of the second IC die, and the first coil and the second coil are aligned with each other across a gap between the first IC die and the second IC die, and wherein the first IC die and the second IC die are galvanically isolated from each other; and one or more dielectric components within the gap, which are positioned directly between the first coil and the second coil. 7. The device of claim 6 , wherein: the first IC die further includes the first communication circuitry coupled to the first coil; and the second IC die further includes second communication circuitry coupled to the second coil. 8. The device of claim 7 , wherein: the first communication circuitry is positioned within a footprint of the first coil; and the second communication circuitry is positioned within a footprint of the second coil. 9. The device of claim 6 , wherein the one or more dielectric components includes a dielectric material with a thickness in a range of about 25 micrometers to about 400 micrometers. 10. The device of claim 6 , wherein the first IC die, the second IC die, and the one or more dielectric components are packaged together in an air-cavity package. 11. The device of claim 6 , wherein the first IC die, the second IC die, and the one or more dielectric components are packaged together in an overmolded package. 12. A transformer-based system comprising: a first coil formed from first portions of a first set of conductive layers of a first integrated circuit (IC) die, wherein first and second terminals of the first coil are configured to be electrically coupled to first communication circuitry; a second coil aligned with the first coil across a gap, wherein the second coil is formed from portions of a second set of conductive layers of a second IC die; and a first capacitor within the first IC die and including a first electrode, a second electrode, and first dielectric material between the first and second electrodes that electrically isolates the first and second electrodes from each other, wherein the first electrode and the second electrode are completely electrically isolated from each other, the first electrode of the first capacitor is formed from at least a portion of the first coil, and the second electrode of the first capacitor includes a plurality of conductive fingers that extend across the first coil outwardly from a location that is vertically offset from a center of the first coil so that the first coil and the plurality of conductive fingers are capacitively coupled, and the second electrode is coupled to a first voltage reference. 13. The transformer-based system of claim 12 , further comprising: a second capacitor with a first electrode and a second electrode, wherein the second electrode of the second capacitor is coupled between the second coil and a second voltage reference. 14. The transformer-based system of claim 13 , wherein: at least a portion of the second coil forms the first electrode of the second capacitor. 15. The transformer-based system of claim 12 , further comprising: the first communication circuitry coupled to the first coil, wherein the first communication circuitry is configured to convert an input signal into a time-varying drive signal, and to provide the time-varying drive signal to the first coil, the first coil is configured to convert the time-varying drive signal into a time-varying magnetic field around the first coil, the first and second coils are arranged so that the time-varying magnetic field couples with the second coil, and the second coil is configured to convert the time-varying magnetic field into an alternating signal; and second communication circuitry coupled to the second coil, wherein the second communication circuitry is configured to receive the alternating signal, and to convert the alternating signal into an approximate version of the input signal. 16. The transformer-based system of claim 15 , further comprising: a second capacitor with a first electrode and a second electrode, wherein the second electrode of the second capacitor is coupled between the second coil and a second voltage reference; and a dielectric structure betwe

Assignees

Inventors

Classifications

  • between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title

  • Encapsulations, e.g. protective coatings · CPC title

  • Multiple coils at either side · CPC title

  • One coil at each side, e.g. with primary and secondary coils · CPC title

  • Electrodes · CPC title

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What does patent US10992346B2 cover?
An embodiment of a transformer-based system or galvanic isolation device includes a first coil, a second coil aligned with the first coil across a gap, and a first capacitor coupled between the first coil and a first voltage reference. A first electrode of the first capacitor may be formed from a conductive electrode structure that is electrically isolated from the first coil, and a second elec…
Who is the assignee on this patent?
Brauchler Fred T, Li Qiang, Nxp Usa Inc
What technology area does this patent fall under?
Primary CPC classification H04B5/72. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Apr 27 2021 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).