Detector circuit

Patent metadata

Field	Value
Publication number	US-10992302-B2
Application number	US-201716072833-A
Country	US
Kind code	B2
Filing date	Jan 30, 2017
Priority date	Jan 29, 2016
Publication date	Apr 27, 2021
Grant date	Apr 27, 2021

Abstract

A waveform synthesizer comprises a controllable oscillator for generating an oscillator waveform having an oscillator cycle; a reference input for accepting a reference signal having a reference cycle; and a waveform detector coupled to said oscillator and said reference input. The waveform detector is arranged to sample said waveform in response to said reference input and to determine waveform information about said oscillator. The waveform information is operative to adjust said controllable oscillator.

First claim

The invention claimed is:

1. A waveform synthesizer comprising:
a controllable oscillator for generating an oscillator waveform having an oscillator cycle;
a reference input for accepting a reference signal having a reference cycle; and
a waveform detector coupled to said oscillator and said reference input, wherein said waveform detector is arranged to sample said waveform in response to said reference input and to determine waveform information about said oscillator, wherein said waveform information is operative to adjust said controllable oscillator.

2. The waveform synthesizer of claim 1 , wherein said waveform detector is capable of detecting any one or more of the amplitude, frequency, phase, and harmonic level of the oscillator waveform.

3. The waveform synthesizer of claim 1 , wherein said adjusting comprises changing at least one of a frequency and of a harmonic level of said controllable oscillator.

4. The waveform synthesizer of claim 1 , wherein said controllable oscillator is a digitally controlled oscillator (DCO) or a class-F oscillator.

5. The waveform synthesizer of claim 1 , wherein said waveform detector is configured to sample the oscillator waveform multiple times per said oscillator cycle.

6. The waveform synthesizer of claim 5 , wherein said waveform detector is configured to sample the oscillator waveform multiple times per said reference cycle.

7. The waveform synthesizer of claim 1 , wherein said waveform is sampled at a significant edge of said reference signal and at a short time, Delta-t, afterwards, and wherein said Delta-t is less than said oscillator cycle.

8. The waveform synthesizer of claim 1 , wherein said waveform is sampled at a significant edge of said reference signal and at multiple times afterwards, and wherein delays between said sampling times are less than said oscillator cycle.

9. The waveform synthesizer of claim 1 , further comprising a controller coupled to said waveform detector, said controller arranged to adjust a waveform parameters of said controllable oscillator.

10. The waveform synthesizer of claim 9 , wherein said waveform parameter is at least one of a frequency and a harmonic level.

11. The waveform synthesizer of claim 1 , wherein said reference cycle is at least ten times longer than said oscillator cycle.

12. The waveform synthesizer of claim 1 , wherein said waveform information comprises phase, frequency and amplitude.

13. The waveform synthesizer of claim 1 , wherein said waveform information comprises a harmonic level.

14. The waveform synthesizer of claim 1 , wherein the waveform synthesizer is arranged to determine both frequency and amplitude information in one period of the oscillator cycle.

15. The waveform synthesizer of claim 1 , wherein the waveform synthesizer is arranged to use oversampling and reconstruction of the waveform in the digital domain in order to extract phase error information.

16. The waveform synthesizer of claim 1 comprising a frequency synthesizer, wherein:
the oscillator waveform is a variable clock, and
said waveform detector samples said reference signal multiple times per reference cycle.

17. A frequency synthesizer comprising:
a controllable oscillator for generating a variable clock having an oscillator cycle;
a reference input for accepting a reference signal having a reference cycle; and
a waveform detector coupled to said oscillator and said reference input, wherein said waveform detector samples said reference signal multiple times per reference cycle.

18. The frequency synthesizer of claim 17 , wherein said reference cycle is at least ten times longer than said oscillator cycle.

19. The frequency synthesizer of claim 17 , wherein each of said multiple reference events is synchronous to said variable clock.

Assignees

• Univ College Dublin Nat Univ Ireland Dublin
• Univ College Dublin National Univ Of Ireland

Inventors

• Siriburanon Teerachot
• Govindaraj Vivek
• Staszewski Robert Bogdan

Classifications

• H03L7/085

  concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal (H03L7/10 takes precedence; circuits for comparing the phase or frequency of two mutually-independent oscillations H03D13/00) · CPC title

• H03L2207/50

  All digital phase-locked loop · CPC title

• G06F1/0321

  Waveform generators, i.e. devices for generating periodical functions of time, e.g. direct digital synthesizers (G06F1/0314, G06F1/035 take precedence) · CPC title

• H03L7/093

  using special filtering or amplification characteristics in the loop (H03L7/087 - H03L7/091 take precedence) · CPC title

• H03L7/091 Primary

  the phase or frequency detector using a sampling device (H03L7/087 takes precedence) · CPC title