Pixel circuit and driving method thereof, display device

Patent metadata

Field	Value
Publication number	US-10991303-B2
Application number	US-201816619189-A
Country	US
Kind code	B2
Filing date	Sep 6, 2018
Priority date	Sep 18, 2017
Publication date	Apr 27, 2021
Grant date	Apr 27, 2021

Abstract

A pixel circuit and a driving method thereof and a display device are disclosed. The pixel circuit includes a switch circuit, a driver circuit, a compensation circuit, a reset circuit and a light emitting element. The driver circuit includes a control terminal, a first terminal and a second terminal and is configured to control a driving current, which runs through the first terminal and the second terminal; the switch circuit is configured to write a data signal to the control terminal in response to a scan signal; the compensation circuit is configured to store the data signal that is written in and electrically connect the control terminal and the second terminal in response to the scan signal; the reset circuit is configured to apply a reset voltage to the compensation circuit in response to a reset signal and electrically connect the control terminal and the first terminal.

First claim

What is claimed is:

1. A pixel circuit, comprising a switch circuit, a driver circuit, a compensation circuit, a reset circuit and a light emitting element,
wherein the driver circuit comprises a control terminal, a first terminal and a second terminal and is configured to control a driving current running through the first terminal and the second terminal, and the driving current is used to drive the light emitting element to emit light;
the switch circuit is configured to write a data signal to the control terminal of the driver circuit in response to a scan signal;
the compensation circuit is configured to store the data signal that is written in and further configured to electrically connect the control terminal of the driver circuit and the second terminal of the driver circuit in response to the scan signal; and
the reset circuit is configured to apply a reset voltage to the compensation circuit in response to a reset signal and electrically connect the control terminal of the driver circuit and the first terminal of the driver circuit.

2. The pixel circuit according to claim 1 , further comprising:
a first light emission control circuit configured to apply a first voltage to the second terminal of the driver circuit and the compensation circuit in response to a first light emission control signal.

3. The pixel circuit according to claim 2 , further comprising:
a second light emission control circuit configured to apply the driving current to the light emitting element in response to a second light emission control signal.

4. The pixel circuit according to claim 3 , wherein the reset circuit comprises a first reset circuit and a second reset circuit, the first reset circuit is configured to electrically connect the control terminal of the driver circuit and the first terminal of the driver circuit in response to the reset signal, and the second reset circuit is configured to apply the reset voltage to the compensation circuit in response to the reset signal.

5. The pixel circuit according to claim 4 , wherein the second reset circuit is electrically connected with the control terminal of the driver circuit and the compensation circuit so as to apply the reset voltage to the control terminal of the driver circuit and the compensation circuit.

6. The pixel circuit according to claim 4 , wherein the second reset circuit is electrically connected with the second light emission control circuit and the light emitting element, so as to apply the reset voltage to the light emitting element and to apply the reset voltage to the compensation circuit via the first reset circuit.

7. The pixel circuit according to claim 4 , wherein the driver circuit comprises a first transistor, a gate electrode of the first transistor serves as the control terminal of the driver circuit and is connected with a first node, a first electrode of the first transistor serves as the first terminal of the driver circuit and is connected with a third node, and a second electrode of the first transistor serves as the second terminal of the driver circuit and is connected with a second node.

8. The pixel circuit according to claim 7 , wherein the switch circuit comprises a second transistor, a gate electrode of the second transistor is configured to be connected with a scan signal terminal so as to receive the scan signal, a first electrode of the second transistor is configured to be connected with a data signal terminal so as to receive the data signal, and a second electrode of the second transistor is connected with the third node.

9. The pixel circuit according to claim 8 , wherein the compensation circuit comprises a third transistor and a storage capacitor, a gate electrode of the third transistor is configured to be connected with the scan signal terminal so as to receive the scan signal, a first electrode of the third transistor is connected with the second node, a second electrode of the second transistor is connected with a first electrode of the storage capacitor, and a second electrode of the storage capacitor is configured to be connected with a first voltage terminal so as to receive the first voltage;
the first light emission control circuit comprises a fourth transistor, a gate electrode of the fourth transistor is configured to be connected with a first light emission control terminal so as to receive the first light emission control signal, a first electrode of the fourth transistor is configured to be connected with the first voltage terminal so as to receive the first voltage, and a second electrode of the fourth transistor is connected with the second node;
the second light emission control circuit comprises a fifth transistor, a gate electrode of the fifth transistor is configured to be connected with a second light emission control terminal so as to receive the second light emission control signal, a first electrode of the fifth transistor is connected with the third node, and a second electrode of the fifth transistor is connected with a first electrode of the light emitting element, and a second electrode of the light emitting element is configured to be connected with a second voltage terminal so as to receive a second voltage; and
the first reset circuit comprises a sixth transistor, a gate electrode of the sixth transistor is configured to be connected with a reset control terminal so as to receive the reset signal, a first electrode of the sixth transistor is connected with the first node, and a second electrode of the sixth transistor is connected with the third node.

10. The pixel circuit according to claim 7 , wherein the compensation circuit comprises a third transistor and a storage capacitor, a gate electrode of the third transistor is configured to be connected with a scan signal terminal so as to receive the scan signal, a first electrode of the third transistor is connected with the second node, a second electrode of the second transistor is connected with a first electrode of the storage capacitor, and a second electrode of the storage capacitor is configured to be connected with a first voltage terminal so as to receive the first voltage.

11. The pixel circuit according to claim 7 , wherein the first light emission control circuit comprises a fourth transistor, a gate electrode of the fourth transistor is configured to be connected with a first light emission control terminal so as to receive the first light emission control signal, a first electrode of the fourth transistor is configured to be connected with a first voltage terminal so as to receive the first voltage, and a second electrode of the fourth transistor is connected with the second node.

12. The pixel circuit according to claim 7 , wherein the second light emission control circuit comprises a fifth transistor, a gate electrode of the fifth transistor is configured to be connected with a second light emission control terminal so as to receive the second light emission control signal, a first electrode of the fifth transistor is connected with the third node, and a second electrode of the fifth transistor is connected with a first electrode of the light emitting element, and a second electrode of the light emitting element is configured to be connected with a second voltage terminal so as to receive a second voltage.

13. The pixel circuit according to claim 7 , wherein the first reset circuit comprises a sixth transistor, a gate electrode of the sixth transistor is configured to be connected with a reset control terminal so as to receive the reset signal, a first electrode of the sixth transistor is connected with the first node, and a second electrode of the sixth transistor is connected with th

Assignees

• Chengdu Boe Optoelect Tech Co
• Boe Technology Group Co Ltd

Inventors

• Lee Sangwon
• Ko Minho
• Kang Sanghun
• Tan Wen
• Ko Young Yik
• Dong Wanli

Classifications

• G09G3/3233 Primary

  with pixel circuitry controlling the current through the light-emitting element · CPC title

• G09G2310/0251

  Precharge or discharge of pixel before applying new pixel voltage · CPC title

• G09G2300/0861

  with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes · CPC title

• G09G3/3266

  Details of drivers for scan electrodes · CPC title

• G09G2300/0842

  forming a memory circuit, e.g. a dynamic memory with one capacitor · CPC title