Sub-resolution assist features

US10990002B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10990002-B2
Application numberUS-201916674439-A
CountryUS
Kind codeB2
Filing dateNov 5, 2019
Priority dateJul 23, 2019
Publication dateApr 27, 2021
Grant dateApr 27, 2021

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Methods of semiconductor device fabrication are provided. In an embodiment, a method of semiconductor device fabrication includes receiving a first mask design comprising a first mask function, determining a transmission cross coefficient (TCC) of an exposure tool, decomposing the TCC into a plurality orders of eigenvalues and a plurality orders of eigenfunctions, calculating a kernel based on the plurality orders of eigenvalues and the plurality orders of eigenfunctions; and determining a first sub-resolution assist feature (SRAF) seed map by convoluting the first mask function and the kernel.

First claim

Opening claim text (preview).

What is claimed is: 1. A method of semiconductor device fabrication, comprising: receiving a first mask design comprising a first mask function; determining a transmission cross coefficient (TCC) of an exposure tool; decomposing the TCC into a plurality orders of eigenvalues and a plurality orders of eigenfunctions; calculating a kernel based on the plurality orders of eigenvalues and the plurality orders of eigenfunctions; determining a first sub-resolution assist feature (SRAF) seed map by convoluting the first mask function and the kernel; storing the kernel in a memory medium; receiving a second mask design comprising a second mask function different from the first mask function; retrieving the kernel stored in the memory medium; determining a second SRAF seed map by convoluting the second mask function and the stored kernel; processing the second SRAF seed map to obtain a second SRAF map; modifying the second mask design according to the second SRAF map to obtain a second modified mask design; and performing photolithography using the exposure tool and the second modified mask design. 2. The method of claim 1 , wherein the first SRAF seed map comprises coordinates of peak positions for placement of a plurality of SRAFs. 3. The method of claim 1 , further comprising: processing the first SRAF seed map to obtain a first SRAF map; modifying the first mask design according to the first SRAF map to obtain a first modified mask design; and performing photolithography using the exposure tool and the first modified mask design. 4. The method of claim 3 , wherein the first SRAF map comprises: a plurality of SRAFs; and a polygonal shape of each of the plurality of SRAFs. 5. The method of claim 1 , wherein the exposure tool comprises an extreme ultraviolet (EUV) exposure tool or a deep ultraviolet (DUV) exposure tool. 6. The method of claim 1 , wherein the TCC comprises information about an illumination intensity of the exposure tool, a numerical aperture of the exposure tool, a thickness of a resist stack to be patterned, or a range of an aberration. 7. The method of claim 1 , wherein the plurality orders of eigenvalues are denoted as λ i , wherein the plurality orders of eigenfunctions are denoted as ϕ i , wherein the kernel is denoted as Ω(x,y), wherein the calculating of the kernel comprises use of the following mathematical formula: Ω ⁡ ( x , y ) = Re ⁡ [ ∑ i = 1 N ⁢ λ i ⁢ ϕ i * ( 0 , 0 ) ⁢ ϕ i ⁡ ( - x , - y ) ] . 8. A method of semiconductor device fabrication, comprising: receiving a first mask design comprising a first mask function (a (x,y)); providing an exposure tool that includes a set of exposure conditions; determining a transmission cross coefficient (TCC) of the exposure tool based on the set of exposure conditions; decomposing the TCC into a plurality orders of eigenvalues (Xi) and a plurality orders of eigenfunctions (ϕ i (x,y)); calculating a kernel (Ω(x,y)) based on the following mathematical formulae: Ω ⁡ ( x , y ) = Re ⁡ [ ∑ i = 1 N ⁢ λ i ⁢ ϕ i * ( 0 , 0 ) ⁢ ϕ i ⁡ ( - x , - y ) ] and determining a first sub-resolution assist feature (SRAF) seed map (Γ(x,y)) by convoluting the kernel and the first mask function using the following mathematical formula: Γ( x,y )= a ( x,y )⊗Ω( x,y ). 9. The method of claim 8 , further comprising: determining a first sub-resolution assist feature (SRAF) seed map (Γ(x,y)) by convoluting the kernel and the first mask function using the following mathematical formula: Γ( x,y )= a ( x,y )⊗Ω( x,y ), wherein the first mask design is assumed to be implemented as an ideal mask. 10. The method of claim 8 , wherein

Assignees

Inventors

Classifications

  • characterised by the processes involved to create the masks · CPC title

  • G03F1/70Primary

    Adapting basic layout or design of masks to lithographic process requirements, e.g., second iteration correction of mask patterns for imaging · CPC title

  • Testing or measuring features, e.g. grid patterns, focus monitors, sawtooth scales or notched scales · CPC title

  • characterised by the use of a particular light source, e.g. fluorescent lamps or deep UV light · CPC title

  • Imaging strategies, e.g. for increasing throughput or resolution, printing product fields larger than the image field or compensating lithography- or non-lithography errors, e.g. proximity correction, mix-and-match, stitching or double patterning · CPC title

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What does patent US10990002B2 cover?
Methods of semiconductor device fabrication are provided. In an embodiment, a method of semiconductor device fabrication includes receiving a first mask design comprising a first mask function, determining a transmission cross coefficient (TCC) of an exposure tool, decomposing the TCC into a plurality orders of eigenvalues and a plurality orders of eigenfunctions, calculating a kernel based on …
Who is the assignee on this patent?
Taiwan Semiconductor Mfg Co Ltd
What technology area does this patent fall under?
Primary CPC classification G03F1/70. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Apr 27 2021 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).