Display driver integrated circuit, display system, and method for driving display driver integrated circuit

US10984730B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10984730-B2
Application numberUS-201816040260-A
CountryUS
Kind codeB2
Filing dateJul 19, 2018
Priority dateNov 1, 2017
Publication dateApr 20, 2021
Grant dateApr 20, 2021

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A display system includes: a host processor for outputting a data load command and outputting compensated image data obtained by compensating for image data; a non-volatile memory for storing compensation data for image compensation; and a display module controlled by the host processor, wherein the display module includes: a display panel including a plurality of pixels, the display panel displaying an image, based on the compensated image data; and a display driver integrated chip (DDI) coupled to the host processor through a first interface, the DDI being coupled to the non-volatile memory through a second interface, the DDI including an interface packet converter for performing packet structure conversion on each of first data compatible with the first interface and second data compatible with the second interface.

First claim

Opening claim text (preview).

What is claimed is: 1. A display system comprising: a host processor configured to output a data load command and outputs compensated image data obtained by compensating for image data; a non-volatile memory configured to store compensation data for image compensation; and a display module controlled by the host processor, wherein the display module includes: a display panel including a plurality of pixels to display an image based on the compensated image data; and a display driver integrated chip (DDI) including a first interface and a second interface and coupled to the host processor through the first interface, the DDI being coupled to the non-volatile memory through the second interface, the DDI including an interface packet converter configured to perform packet structure conversion on each of first data compatible with the first interface and second data compatible with the second interface, wherein the interface packet converter converts a packet structure of the first data received from the host processor through the first interface in a format compatible with the second interface and converts a packet structure of the second data received from the non-volatile memory through the second interface in a format compatible with the first interface, and wherein the converted second data is transmitted to the host processor through the first interface included in the DDI. 2. The display system of claim 1 , wherein the interface packet converter includes: a first converter configured to rearrange the packet structure of the first data received through the first interface in the format compatible with the second interface; and a second converter configured to rearrange the packet structure of the second data received through the second interface in the format compatible with the first interface. 3. The display system of claim 2 , wherein the first data corresponds to the data load command for loading data stored in the non-volatile memory, and the second data corresponds to the compensation data read from the non-volatile memory based on the data load command. 4. The display system of claim 2 , wherein the first interface corresponds to a mobile industry processor interface (MIPI), and the second interface corresponds to a serial peripheral interface (SPI). 5. The display system of claim 1 , wherein the compensation data includes at least one of offsets for optical compensation and offsets for afterimage compensation. 6. The display system of claim 5 , wherein the host processor performs image data compensation on the image data, based on the compensation data, to generate the compensated image data, and provides the compensated image data to the display module through the first interface. 7. The display system of claim 5 , wherein the host processor includes an image data compensator configured to perform at least one of optical compensation and afterimage compensation on the image data, based on the compensation data. 8. The display system of claim 1 , wherein the host processor performs communication with the non-volatile memory via the DDI. 9. A method for driving a display system which comprises a host processor, an external non-volatile memory (NVM), and a display module, the display module including a display driver integrated chip (DDI), the method comprising: receiving a data load command for image compensation, which is output from the host processor, through a first interface disposed in the display module; converting a packet structure of the data load command to be compatible with a second interface disposed in the display module; transmitting the converted data load command to the NVM through the second interface; receiving compensation data loaded from the NVM through the second interface; converting a packet structure of the compensation data to be compatible with the first interface; and transmitting the converted compensation data to the host processor through the first interface. 10. The method of claim 9 , wherein the first interface corresponds to a mobile industry processor interface (MIPI), and the second interface corresponds to a serial peripheral interface (SPI).

Assignees

Inventors

Classifications

  • Reduction of after-image effects · CPC title

  • G09G5/006Primary

    Details of the interface to the display terminal (specific for a display terminal using a CRT G09G1/167; using a flat panel G09G3/2096; circuits for interfacing with colour displays G09G5/04) · CPC title

  • G06F3/0416Primary

    Control or interface arrangements specially adapted for digitisers · CPC title

  • Details of image data interface between the display device controller and the data line driver circuit · CPC title

  • Digitisers structurally integrated in a display · CPC title

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Frequently asked questions

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What does patent US10984730B2 cover?
A display system includes: a host processor for outputting a data load command and outputting compensated image data obtained by compensating for image data; a non-volatile memory for storing compensation data for image compensation; and a display module controlled by the host processor, wherein the display module includes: a display panel including a plurality of pixels, the display panel disp…
Who is the assignee on this patent?
Samsung Display Co Ltd
What technology area does this patent fall under?
Primary CPC classification G09G5/006. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Apr 20 2021 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 4 related publications on this page (citations in our corpus or others sharing the same primary CPC).