Reduced frequency backwards clock for isolated sigma-delta modulators
US-9479325-B1 · Oct 25, 2016 · US
US10979030B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10979030-B2 |
| Application number | US-201816044731-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jul 25, 2018 |
| Priority date | Aug 25, 2017 |
| Publication date | Apr 13, 2021 |
| Grant date | Apr 13, 2021 |
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The invention provides a system improving signal handling, e.g., transmission and/or processing. In an embodiment, the system may include a filter circuit, a magnitude bit truncation circuit and a utility circuit. The filter circuit may be coupled to a target signal which contains one or more desired signals at one or more interested bands, for attenuating each said interested band to form a filtered signal. The magnitude bit truncation circuit may be coupled to the filter circuit, for truncating one or more bits of each sample of the filtered signal to form a truncated signal. The utility circuit may be coupled to the magnitude bit truncation circuit, for handling the truncated signal to implement handling of the target signal, so as to reduce resource requirement and enhance error tolerance comparing with directly handling the target signal.
Opening claim text (preview).
What is claimed is: 1. A system improving signal handling, comprising: a modulator that modulates a target signal into a modulated signal; a digital filter circuit for attenuating one or more bands of the modulated signal to form a filtered signal; a magnitude bit truncation circuit coupled to the digital filter circuit, for truncating one or more bits of each sample of the filtered signal to form a truncated signal; and a utility circuit coupled to the magnitude bit truncation circuit, for handling the truncated signal to implement handling of the target signal, wherein the utility circuit comprises a physical layer circuit that organizes samples of the truncated signal into packets by attaching headers and trailers. 2. The system of claim 1 , wherein the modulator is a multi-bit sigma-delta modulator arranged to modulate the target signal by multi-bit sigma-delta modulation. 3. The system of claim 1 , wherein the target signal is an analog signal, and the modulated signal is a digital signal. 4. The system of claim 1 , wherein the target signal is a digital signal and a number of bits per sample of the target signal is greater than a number of bits per sample of the modulated signal. 5. The system of claim 1 , wherein the digital filter circuit is a digital difference encoder for attenuating each band of interest by differential operation. 6. The system of claim 1 , wherein the utility circuit handles the truncated signal to form a handled signal, and the system further comprises an inverse filter circuit for integrating the handled signal. 7. The system of claim 1 , wherein the utility circuit is a digital signal processor for processing the truncated signal to implement processing of the target signal. 8. The system of claim 1 , wherein the utility circuit handles the truncated signal to form a handled signal, and the system further comprises an inverse filter circuit coupled to the utility circuit, for applying an inverse filtering transfer function to the handled signal, wherein the inverse filtering transfer function is a reciprocal of a transfer function of the digital filter circuit in each band of interest. 9. The system of claim 1 , wherein the magnitude bit truncation circuit truncates one of more most significant bits from a magnitude portion of the samples of the filtered signal. 10. The system of claim 1 , wherein the magnitude bit truncation circuit keeps a sign bit of the samples of the filtered signal unchanged.
Arrangements specific to bandpass modulators · CPC title
Arrangements specific to bandpass modulators · CPC title
using delta modulation or one-bit differential modulation [1DPCM] · CPC title
by filtering other than the noise-shaping inherent to delta-sigma modulators, e.g. anti-aliasing · CPC title
Continuously compensating for, or preventing, undesired influence of physical parameters (periodically, e.g. by using stored correction values, H03M3/378) · CPC title
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