Hardware-efficient fault-tolerant operations with superconducting circuits
US-2020334104-A1 · Oct 22, 2020 · US
US10978631B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10978631-B2 |
| Application number | US-201916567748-A |
| Country | US |
| Kind code | B2 |
| Filing date | Sep 11, 2019 |
| Priority date | Sep 11, 2019 |
| Publication date | Apr 13, 2021 |
| Grant date | Apr 13, 2021 |
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A method of producing a quantum circuit includes forming a mask on a substrate to cover a first portion of the substrate, implanting a second portion of the substrate with ions, and removing the mask, thereby providing a nanowire. The method further includes forming a first lead and a second lead, the first lead and the second lead each partially overlapping the nanowire. In operation, a portion of the nanowire between the first and second leads forms a quantum dot, thereby providing a quantum dot Josephson junction. The method further includes forming a third lead and a fourth lead, one of the third and fourth leads partially overlapping the nanowire, wherein the third lead is separated from the fourth lead by a dielectric layer, thereby providing a Dolan bridge Josephson junction. The nanowire is configured to connect the quantum dot Josephson junction and the Dolan bridge Josephson junction in series.
Opening claim text (preview).
What is claimed is: 1. A method of producing a quantum circuit, comprising: forming a mask on a substrate to cover a first portion of said substrate; implanting a second portion of said substrate not covered by said mask with ions; and removing said mask, thereby providing a nanowire comprising said first portion of said substrate; forming a first lead and a second lead on top of said substrate, said first lead being spaced apart from said second lead, said first lead and said second lead each partially overlapping said nanowire, wherein, in operation, a portion of said nanowire between said first and second leads forms a quantum dot, thereby providing a quantum dot Josephson junction; and forming a third lead and a fourth lead on top of said substrate, one of said third lead and said fourth lead partially overlapping said nanowire, wherein said third lead is separated from said fourth lead by a dielectric layer, thereby providing a Dolan bridge Josephson junction, wherein said nanowire is configured to connect said quantum dot Josephson junction and said Dolan bridge Josephson junction in series. 2. The method according to claim 1 , wherein forming said first lead and said second lead comprises forming said first lead and said second lead to be substantially perpendicular to said nanowire. 3. The method according to claim 1 , wherein forming said third lead and said fourth lead comprises: forming said third lead on said substrate such that said third lead partially overlaps said nanowire; oxidizing said third lead to form said dielectric layer; and forming said fourth lead in contact with said dielectric layer. 4. The method according to claim 1 , wherein said third lead extends substantially perpendicular to said fourth lead. 5. The method according to claim 1 , wherein said third lead extends substantially perpendicular to said nanowire. 6. The method according to claim 1 , further comprising: forming a nanowire source lead on said substrate, said nanowire source lead overlapping said nanowire at a first end of said nanowire; and forming a nanowire drain lead on said substrate, said nanowire drain lead overlapping said nanowire at a second end of said nanowire, said second end opposing said first end. 7. The method according to claim 1 , wherein at least one of said forming said first and second leads and said forming said third and fourth leads comprises lift off processing.
Nanowires · CPC title
of nanotubes or nanowires · CPC title
Josephson-effect devices · CPC title
Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic · CPC title
Electricity · mapped topic
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