System and Method for Low Power Transmission
US-2015195790-A1 · Jul 9, 2015 · US
US10972977B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10972977-B2 |
| Application number | US-201916588454-A |
| Country | US |
| Kind code | B2 |
| Filing date | Sep 30, 2019 |
| Priority date | Sep 28, 2014 |
| Publication date | Apr 6, 2021 |
| Grant date | Apr 6, 2021 |
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The disclosure discloses a high-efficiency short training field sequence generation method, a signal sending method, a signal receiving method, and related apparatuses, where the high-efficiency short training sequence generation method includes: increasing frequency domain density of a frequency domain sequence corresponding to a first high-efficiency short training field sequence to generate a frequency domain sequence with increased frequency domain density; generating a second high-efficiency short training field sequence according to the frequency domain sequence with increased frequency domain density; and using the second high-efficiency short training field sequence as a high-efficiency short training field sequence in a preamble sequence of a data transmission frame in a wireless local area network WLAN. In embodiments of the disclosure, a cycle of a high-efficiency short training field sequence used for performing stage-2 AGC adjustment in the WLAN may be increased, and a maximum CSD value that can be used is further increased.
Opening claim text (preview).
What is claimed is: 1. A signal sending method, the method comprising: generating a first preamble, wherein the first preamble comprises a first high-efficiency short training field, wherein the first high-efficiency short training field occupies at least 4 μs, wherein a duration of 4 μs includes 2.5 cycles, and wherein a length of each cycle is 1600 ns; and sending the first preamble. 2. The signal sending method according to claim 1 , wherein the first preamble corresponds to a current bandwidth, and the first high-efficiency short training field includes a segment of a second high-efficiency short training field in a second preamble corresponding to a reference bandwidth, and the first high-efficiency short training field in the first preamble corresponding to the current bandwidth includes 2.5 cycles in 4 μs, the length of each cycle of the 2.5 cycles is 1600 ns; and the method further comprising: sending the first preamble corresponding to the current bandwidth. 3. The signal sending method according to claim 2 , wherein a sampling rate of the segment of the second high-efficiency short training field in the second preamble corresponding to the reference bandwidth corresponds to the current bandwidth. 4. A signal receiving method, the method comprising: receiving a first preamble, wherein the first preamble comprises a first high-efficiency short training field, wherein the first high-efficiency short training field occupies at least 4 μs, wherein a duration of 4 μs includes 2.5 cycles, and wherein a length of each cycle is 1600 ns; and processing signals based on the first high-efficiency short training field. 5. The signal receiving method according to claim 4 , wherein the first preamble corresponds to a current bandwidth, and the first high-efficiency short training field includes a segment of a second high-efficiency short training field in a second preamble corresponding to a reference bandwidth, and the first high-efficiency short training field in the first preamble corresponding to the current bandwidth includes 2.5 cycles in 4 μs, the length of each cycle of the 2.5 cycles is 1600 ns; and the method further comprising: processing signals based on the first high-efficiency short training field in the first preamble corresponding to the current bandwidth. 6. The signal receiving method according to claim 5 , wherein a sampling rate of the segment of the second high-efficiency short training field in the second preamble corresponding to the reference bandwidth corresponds to the current bandwidth. 7. A signal sending device comprising: a processor configured to generate a first preamble, wherein the first preamble comprises a first high-efficiency short training field, wherein the first high-efficiency short training field occupies at least 4 μs, wherein a duration of 4 μs includes 2.5 cycles, and wherein a length of each cycle is 1600 ns; and a transmitter configured to cooperate with the processor to send the first preamble. 8. The signal sending device according to claim 7 , wherein the first preamble corresponds to a current bandwidth; wherein the first high-efficiency short training field includes a segment of a second high-efficiency short training field in a second preamble corresponding to a reference bandwidth, and the first high-efficiency short training field in the first preamble corresponding to the current bandwidth includes 2.5 cycles in 4 μs, the length of each cycle of the 2.5 cycles is 1600 ns; and wherein the transmitter is configured to cooperate with the processor to send the first preamble corresponding to the current bandwidth. 9. The signal sending device according to claim 8 , wherein a sampling rate of the segment of the second high-efficiency short training field in the second preamble corresponding to the reference bandwidth corresponds to the current bandwidth. 10. A signal receiving device comprising: a processor; and a receiver configured to cooperate with the processor to receive a first preamble, wherein the first preamble comprises a first high-efficiency short training field, wherein the first high-efficiency short training field occupies at least 4 μs, wherein a duration of 4 μs includes 2.5 cycles, and wherein a length of each cycle is 1600 ns; wherein the processor is configured to process signals based on the first high-efficiency short training field. 11. The signal receiving device according to claim 10 , wherein the first preamble corresponds to a current bandwidth, and the first high-efficiency short training field includes a segment of a second high-efficiency short training field in a second preamble corresponding to a reference bandwidth, and the first high-efficiency short training field in the first preamble corresponding to the current bandwidth includes 2.5 cycles in 4 μs, the length of each cycle of the 2.5 cycles is 1600 ns; and wherein the processor is further configured to process signals based on the first high-efficiency short training field in the first preamble corresponding to the current bandwidth. 12. The signal receiving device according to claim 11 , wherein a sampling rate of the segment of the second high-efficiency short training field in the second preamble corresponding to the reference bandwidth corresponds to the current bandwidth.
using repetition · CPC title
Structure of the reference signals · CPC title
Signal structure ensuring backward compatibility with legacy system · CPC title
where the received signal is a wanted signal · CPC title
Allocation of signalling, i.e. of overhead other than pilot signals · CPC title
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