Low density parity check code decoder and method for decoding LDPC code

Patent metadata

Field	Value
Publication number	US-10972129-B2
Application number	US-201916550408-A
Country	US
Kind code	B2
Filing date	Aug 26, 2019
Priority date	Oct 12, 2018
Publication date	Apr 6, 2021
Grant date	Apr 6, 2021

Abstract

A check node update processor of the low density parity check (LDPC) code decoder includes: an approximate first minimum (AFM) condition check unit which checks whether a predetermined specific condition is satisfied, and a check node determining unit which sets an approximate minimum value as a size of an entire check node output when it is determined that the specific condition is satisfied as a checking result in the AFM condition check unit and calculates a first minimum value as a true minimum value and sets a second minimum value as an approximate minimum value when it is determined that the specific condition is not satisfied to determine a size of the check node output.

First claim

What is claimed is:

1. A low density parity check (LDPC) code decoder, comprising:
a variable node update processor; and
a check node update processor configured to determine minimum values by comparing sizes of absolute values of variable-to-check messages entering from variable nodes connected based on an arbitrary check node,
wherein the check node update processor includes:
an approximate first minimum (AFM) condition check unit comprising an AND gate configured to check whether a predetermined specific condition is satisfied through a logical AND gate operation process of one bit of each variable-to-check message; and
a check node determining unit which, when it is determined that the predetermined specific condition is satisfied as a checking result in the AFM condition check unit, sets an approximate minimum value as a size of an entire check node output, and when it is determined that the predetermined specific condition is not satisfied, sets a calculated minimum value obtained by a minimum value generating unit as a size of a check node output.

2. The LDPC code decoder according to claim 1 , wherein the AFM condition check unit is configured by the AND gate with a tree structure, and
wherein the check node determining unit, when an AND gate operation result value is 1 , uses the approximate minimum value as the entire check node output, and when the AND gate operation result value is 0, the check node determining unit uses a minimum value obtained by the minimum value generating unit as the check node output.

3. The LDPC code decoder according to claim 1 , wherein the AFM condition check unit makes a decision using one bit information of each variable-to-check message.

4. The LDPC code decoder according to claim 1 , wherein the check node determining unit includes a multiplexer (MUX) which selectively operates in accordance with a result value generated from the AFM condition check unit.

5. The LDPC code decoder according to claim 4 , wherein the check node determining unit includes an approximate value usage condition generating unit which determines whether to use the approximate minimum value and is connected to a true minimum value generating unit which calculates a true minimum value.

6. The LDPC code decoder according to claim 5 , wherein the true minimum value generating unit generates the true minimum value by lowering a quantization level in accordance with the result value transmitted from the AFM condition check unit.

7. A low density parity check (LDPC) code decoder, comprising:
a variable node update processor; and
a check node update processor configured to determine minimum values by comparing sizes of absolute values of variable-to-check messages entering from variable nodes connected based on an arbitrary check node,
wherein the check node update processor includes:
an approximate first minimum (AFM) condition check unit which determines whether a reference quantization level of check node input values is saturated using one bit information of each variable-to-check message; and
a minimum value generating unit which generates a minimum value by lowering a quantization level in accordance with a result value transmitted from the AFM condition check unit.

8. A decoding method of a low density parity check (LDPC) code decoder comprising a variable node update processor, and a check node update processor configured to determine minimum values by comparing sizes of absolute values of variable-to-check messages entering from variable nodes connected based on an arbitrary check node, the method comprising:
checking whether a predetermined specific condition is satisfied using one bit information from each variable-to-check message;
setting an approximate minimum value as a size of an entire check node output, when the predetermined specific condition is satisfied;
setting a calculated minimum value obtained by a minimum value generating unit as a size of a check node output, when the predetermined specific condition is not satisfied; and
decoding using the size of the check node output.

9. The decoding method according to claim 8 , wherein the check node update processor comprises an approximate first minimum (AFM) condition check unit including an AND gate configured to make a decision using the one bit information from each variable-to-check message.

Assignees

• Univ Korea Res & Bus Found

Inventors

• Heo Jun
• Yoon Sung Sik
• Ahn Byung Kyu

Classifications

• H03M13/6502

  Reduction of hardware complexity or efficient processing · CPC title

• H03M13/1117 Primary

  using approximations for check node processing, e.g. an outgoing message is depending on the signs and the minimum over the magnitudes of all incoming messages according to the min-sum rule · CPC title

• H03M13/6577

  Representation or format of variables, register sizes or word-lengths and quantization · CPC title

• H03M13/1102 Primary

  Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes · CPC title

• H03M13/458

  by updating bit probabilities or hard decisions in an iterative fashion for convergence to a final decoding result · CPC title