Semiconductor device

Patent metadata

Field	Value
Publication number	US-10972089-B2
Application number	US-201816119206-A
Country	US
Kind code	B2
Filing date	Aug 31, 2018
Priority date	Oct 17, 2017
Publication date	Apr 6, 2021
Grant date	Apr 6, 2021

Abstract

A semiconductor device includes a power semiconductor switching element including a characteristic test terminal, and a control circuit configured to control an operation of the power semiconductor switching element. The power semiconductor switching element and the control circuit are formed in a same chip. The control circuit includes a gate voltage generation circuit configured to generate a current limit gate voltage for restricting an overcurrent flowing in the power semiconductor switching element in a desired range when an abnormality occurs, based on a characteristic of the power semiconductor switching element which is measured in advance by applying a voltage to the characteristic test terminal.

First claim

The invention claimed is:

1. A semiconductor device comprising:
a power semiconductor switching element having terminals and including a characteristic test terminal connected to one of the terminals of the power semiconductor switching element; and
a control circuit configured to control an operation of the power semiconductor switching element, wherein the power semiconductor switching element and the control circuit are formed in a same chip,
the control circuit including a gate voltage generation circuit configured to generate a current limit gate voltage to restrict an overcurrent flowing in the power semiconductor switching element in a desired range when an abnormality occurs, based on a characteristic of the power semiconductor switching element which is measured in advance by applying a voltage to the characteristic test terminal of the power semiconductor switching element.

2. The semiconductor device according to claim 1 ,
wherein the power semiconductor switching element includes a normally-off type IGBT having a gate as the one of the terminals, the characteristic test terminal is connected to the gate of the IGBT, and the characteristic is a forward transfer characteristic which represents a relationship between a collector-emitter current and a gate voltage of the IGBT.

3. The semiconductor device according to claim 1 ,
wherein the gate voltage generation circuit includes a constant current supply, a load, and a trimming circuit and is configured to generate the current limit gate voltage.

4. The semiconductor device according to claim 3 ,
wherein the trimming circuit is configured to control a value of the current limit gate voltage based on a voltage dividing ratio between voltages divided by resistors.

5. A semiconductor device comprising:
a power semiconductor switching element including a characteristic test terminal; and
a control circuit configured to control an operation of the power semiconductor switching element, the power semiconductor switching element and the control circuit being formed in a same chip, the control circuit including a gate voltage generation circuit configured to generate a current limit gate voltage to restrict an overcurrent flowing in the power semiconductor switching element in a desired range when an abnormality occurs, based on a characteristic of the power semiconductor switching element which is measured in advance by applying a voltage to the characteristic test terminal,
the power semiconductor switching element including a normally-off type IGBT, the characteristic test terminal being connected to a gate of the IGBT, and the characteristic being a forward transfer characteristic which represents a relationship between a collector-emitter current and a gate voltage of the IGBT.

6. A semiconductor device comprising:
a power semiconductor switching element including a characteristic test terminal; and
a control circuit configured to control an operation of the power semiconductor switching element, the power semiconductor switching element and the control circuit being formed in a same chip, the control circuit including a gate voltage generation circuit configured to generate a current limit gate voltage to restrict an overcurrent flowing in the power semiconductor switching element in a desired range when an abnormality occurs, based on a characteristic of the power semiconductor switching element which is measured in advance by applying a voltage to the characteristic test terminal,
the gate voltage generation circuit including a constant current supply, a load, and a trimming circuit, and being configured to generate the current limit gate voltage.

7. The semiconductor device according to claim 6 ,
wherein the trimming circuit is configured to control a value of the current limit gate voltage based on a voltage dividing ratio between voltages divided by resistors.

Assignees

• Fuji Electric Co Ltd

Inventors

• Abe Yuya
• Kohama Takanori

Classifications

• H03K17/74

  by the use, as active elements, of diodes (by the use of more than one type of semiconductor device H03K17/567; by the use of tunnel diodes H03K17/58; by the use of negative resistance diodes H03K17/70) · CPC title

• F02P3/0554

  using digital techniques (F02P3/0558 takes precedence) · CPC title

• H03K17/0828 Primary

  in composite switches · CPC title

• F02P3/04

  Layout of circuits · CPC title

• F02P3/0552

  Opening or closing the primary coil circuit with semiconductor devices · CPC title