Optimizing space utilization by retaining metadata in cache

US10970221B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10970221-B2
Application numberUS-201916398670-A
CountryUS
Kind codeB2
Filing dateApr 30, 2019
Priority dateApr 30, 2019
Publication dateApr 6, 2021
Grant dateApr 6, 2021

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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Abstract

Official abstract text for this publication.

A technique for managing data received into a cache operates in cycles. To process a current batch of compressed blocks during a current cache processing cycle, a storage system obtains a new mapping structure and a new segment of contiguous storage space. If the system can place some of the current batch of compressed blocks into previously-allocated space, the system does so and partially populates the new mapping structure with entries for mapping the other compressed blocks that were not placed. The system then asserts a hold on the new mapping structure, so that the mapping structure is retained in cache at the end of the current cache processing cycle, and more completely populates the new mapping structure with entries for other compressed blocks during a later cache processing cycle before releasing the hold.

First claim

Opening claim text (preview).

What is claimed is: 1. A method of managing data received for writing, the method comprising: during a first cache processing cycle, (i) placing M compressed blocks of the data in a segment of storage space, (ii) populating M entries of a mapping structure in cache for mapping the M compressed blocks in the segment, the mapping structure having space for N entries, N>M, with N-M locations of the mapping structure remaining unpopulated, and (iii), applying a hold to the mapping structure in the cache to ensure that the mapping structure is retained in the cache; during a second cache processing cycle, (i) placing between 1 and N-M additional compressed blocks in the segment and (ii) populating an additional location in the mapping structure for each additional compressed block placed or to be placed in the segment; and during or after the second cache processing cycle, releasing the hold on the mapping structure. 2. The method of claim 1 , wherein the M compressed blocks have a collective size in the segment, and wherein the method further comprises, during the first cache processing cycle and prior to placing the M compressed blocks in the segment, allocating the segment with a size that exceeds the collective size of the M compressed blocks by a margin, the margin based upon a predicted size of N-M additional compressed blocks. 3. The method of claim 2 , further comprising predicting the size of the N-M additional compressed blocks based on (i) a block size of uncompressed blocks in the cache and (ii) a compression ratio achieved when compressing previously processed blocks. 4. The method of claim 2 , wherein one or more of the M compressed blocks represent overwrites of data elements already stored, and wherein the method further comprises, for at least one of the M compressed blocks: identifying a current storage location of the respective data element; and confirming that the compressed block does not fit in a space provided for the respective data element at the current storage location. 5. The method of claim 4 , wherein, during the first cache processing cycle, the M compressed blocks belong to a batch of N compressed blocks, and wherein the method further comprises, for each of the N compressed blocks in the batch that is not one of the M compressed blocks, placing the compressed block in another segment that has available space for accommodating the compressed block. 6. The method of claim 4 , wherein the cache operates repeatedly on successive cache processing cycles, and wherein during each cache processing cycle, the method includes (i) allocating a new segment for placing compressed blocks during that cache processing cycle and (ii) allocating a new mapping structure for mapping the compressed blocks in the respective new segment. 7. The method of claim 6 , wherein allocating each new segment includes over-allocating space within the new segment when fewer than N compressed blocks are being placed in the new segment during the cache processing cycle. 8. The method of claim 6 , further comprising running multiple computing threads that manage data in the cache, each of the computing threads configured to place holds on certain mapping structures, and wherein the method further comprises maintaining a hold list of mapping structures on which holds have been placed by the computing threads. 9. The method of claim 8 , further comprising: obtaining, by one of the computing threads, a new batch of N compressed blocks from the cache; accessing the hold list; identifying a mapping structure on the hold list that maps to a segment that has available space for storing one or more of the N compressed blocks, and placing said one or more of the N compressed blocks in the segment mapped by the identified mapping structure. 10. A computerized apparatus, comprising control circuitry that includes a set of processing units coupled to memory, the control circuitry constructed and arranged to: during a first cache processing cycle, (i) place M compressed blocks of the data in a segment of storage space, (ii) populate M entries of a mapping structure in cache for mapping the M compressed blocks in the segment, the mapping structure having space for N entries, N>M, with N-M locations of the mapping structure remaining unpopulated, and (iii), apply a hold to the mapping structure in the cache to ensure that the mapping structure is retained in the cache; during a second cache processing cycle, (i) place between 1 and N-M additional compressed blocks in the segment and (ii) populate an additional location in the mapping structure for each additional compressed block placed or to be placed in the segment; and during or after the second cache processing cycle, release the hold on the mapping structure. 11. The computerized apparatus of claim 10 , wherein the M compressed blocks have a collective size in the segment, and wherein, during the first cache processing cycle and prior to placing the M compressed blocks in the segment, the control circuitry is further constructed and arranged to allocate the segment with a size that exceeds the collective size of the M compressed blocks by a margin, the margin based upon a predicted size of N-M additional compressed blocks. 12. A computer program product including a set of non-transitory, computer-readable media having instructions which, when executed by control circuitry of a computerized apparatus, cause the control circuitry to perform a method of managing data received for writing, the method comprising: during a first cache processing cycle, (i) placing M compressed blocks of the data in a segment of storage space, (ii) populating M entries of a mapping structure in cache for mapping the M compressed blocks in the segment, the mapping structure having space for N entries, N>M, with N-M locations of the mapping structure remaining unpopulated, and (iii), applying a hold to the mapping structure in the cache to ensure that the mapping structure is retained in the cache; during a second cache processing cycle, (i) placing between 1 and N-M additional compressed blocks in the segment and (ii) populating an additional location in the mapping structure for each additional compressed block placed or to be placed in the segment; and during or after the second cache processing cycle, releasing the hold on the mapping structure. 13. The computer program product of claim 12 , wherein the M compressed blocks have a collective size in the segment, and wherein the method further comprises, during the first cache processing cycle and prior to placing the M compressed blocks in the segment, allocating the segment with a size that exceeds the collective size of the M compressed blocks by a margin, the margin based upon a predicted size of N-M additional compressed blocks. 14. The computer program product of claim 13 , wherein the method further comprises predicting the size of the N-M additional compressed blocks based on (i) a block size of uncompressed blocks in the cache and (ii) a compression ratio achieved when compressing previously processed blocks. 15. The computer program product of claim 13 , wherein one or more of the M compressed blocks represent overwrites of data elements already stored, and wherein the method further comprises, for at least one of the M compressed blocks: identifying a current storage location of the respective data element; and confirming that the compressed block does not fit in a space provided for the respective data element at the current storage location. 16. The computer program product of claim 15 , wherein, during the first cac

Assignees

Inventors

Classifications

  • Distributed or networked storage systems, e.g. storage area networks [SAN], network attached storage [NAS] · CPC title

  • Data buffering arrangements · CPC title

  • Improving I/O performance · CPC title

  • Management of blocks · CPC title

  • Allocation or management of cache space · CPC title

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What does patent US10970221B2 cover?
A technique for managing data received into a cache operates in cycles. To process a current batch of compressed blocks during a current cache processing cycle, a storage system obtains a new mapping structure and a new segment of contiguous storage space. If the system can place some of the current batch of compressed blocks into previously-allocated space, the system does so and partially pop…
Who is the assignee on this patent?
Emc Ip Holding Co Llc
What technology area does this patent fall under?
Primary CPC classification G06F12/0871. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Apr 06 2021 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 7 related publications on this page (citations in our corpus or others sharing the same primary CPC).