Adding a voltage level to a phase-redundant regulator level

Patent metadata

Field	Value
Publication number	US-10958175-B2
Application number	US-201916720998-A
Country	US
Kind code	B2
Filing date	Dec 19, 2019
Priority date	Mar 26, 2019
Publication date	Mar 23, 2021
Grant date	Mar 23, 2021

Abstract

A phase-redundant voltage regulator can include multiple regulator phases connected in parallel between a common regulator input and a common regulator output. Each regulator phase includes a voltage regulator that receives an input voltage and drives a respective output voltage. The voltage regulator also includes a plurality of linear regulators, each having a linear ORing device electrically connected between the regulator output of a respective regulator and an output of the linear regulator. The voltage regulator also includes an amplifier having inputs electrically connected to a remote voltage sense input and to a reference voltage input. An output of the voltage regulator is electrically connected to an input of the linear ORing device. The amplifier controls the linear ORing device to drive a voltage on the output of the linear regulator equivalent to a voltage on the reference voltage input.

First claim

What is claimed is:

1. An apparatus comprising:
a plurality of regulator phases each connected between a common regulator input and a common regulator output, each including a regulator configured to receive, at a regulator input, an input voltage and provide an output voltage; and
a plurality of linear regulators, each having:
a linear ORing device connected between the regulator output of a respective regulator and an output of the linear regulator;
an amplifier configured to control the linear ORing device to drive, on the output of the linear regulator, a voltage equivalent to a voltage on a reference voltage input.

2. The apparatus of claim 1 , each regulator phase of the plurality of regulator phases further including:
a phase-redundant controller configured to monitor current at the regulator input and further configured to monitor current and voltage at the regulator output;
an output ORing device configured to limit current flow into the output of the respective regulator phase; and
an input protection device configured to provide, in response to a control signal from the phase-redundant controller, input overcurrent protection and output overvoltage protection to the respective regulator phase.

3. The apparatus of claim 2 , further comprising:
a multi-phase controller (MPC) coupled to each regulator phase of the plurality of regulator phases, the MPC configured to:
receive a feedback output voltage and a respective detected current signal from each regulator phase of the plurality of regulator phases;
generate control signals to sequentially activate each regulator phase of the plurality of regulator phases for predetermined periods of time, the control signals managing controlled current-sharing between phases; and
maintain, following a failure of one or more regulator phase of the plurality of regulator phases, current-sharing between all active regulator phases of the plurality of regulator phases.

4. The apparatus of claim 1 , wherein a voltage driven on the output of the linear regulator is in a range between 0.1 V and 1.0 V lower than a voltage driven on the regulator output of a respective regulator.

5. The apparatus of claim 1 , wherein a current provided by the output of the linear regulator is in a range between 0.1 A and 5.0 A.

6. The apparatus of claim 1 , wherein the linear ORing device is selected from the group consisting of: an N-channel field-effect transistor (NFET), a P-channel field-effect transistor (PFET), an NPN transistor, and a PNP transistor.

7. The apparatus of claim 1 , wherein the amplifier is an operational amplifier (op-amp).

8. The apparatus of claim 1 , wherein outputs of the linear regulators of the plurality of linear regulators are electrically connected to a common linear regulator output.

9. The apparatus of claim 1 , wherein the plurality of linear regulators are configured to maintain current sharing.

10. An apparatus comprising:
a plurality of regulator phases each connected between a common regulator input and a common regulator output, each including a regulator configured to receive, at a regulator input, an input voltage and provide an output voltage; and
a plurality of linear regulators, each having:
a linear ORing field-effect transistor (FET) connected between the regulator output of a respective regulator and an output of the linear regulator;
an operational amplifier (op-amp) configured to control the linear ORing device to drive, on the output of the linear regulator, a voltage equivalent to a voltage on a reference voltage input.

11. The apparatus of claim 10 , each regulator phase of the plurality of regulator phases further including:
an output ORing FET electrically coupled between the regulator output and the common regulator output;
a comparator having inputs electrically connected to a source terminal and to a drain terminal of the output ORing FET, the comparator further having an output electrically connected to a gate terminal of the output ORing FET, the comparator configured to, in conjunction with the output ORing FET, limit current flow into the regulator output;
an input protection FET coupled between the common regulator input and the regulator input; and
a latch having an output electrically connected to a gate terminal of the input protection FET, the latch configured to, in conjunction with the input protection FET, provide input overcurrent protection and output overvoltage protection to the regulator phase.

12. The apparatus of claim 11 , further comprising:
a multi-phase controller (MPC) coupled to each regulator phase of the plurality of regulator phases, the MPC configured to:
receive a feedback output voltage and a respective detected current signal from each regulator phase of the plurality of regulator phases;
generate control signals to sequentially activate each regulator phase of the plurality of regulator phases for predetermined periods of time, the control signals managing controlled current-sharing between phases; and
maintain, following a failure of one or more regulator phase of the plurality of regulator phases, current-sharing between all active regulator phases of the plurality of regulator phases.

13. The apparatus of claim 11 , wherein a control input of the output ORing FET is electrically connected, through a diode, to the control input of the linear ORing device.

14. The apparatus of claim 10 , wherein a regulator serial interface of a multi-phase controller (MPC) is coupled to a system control function through a serial control bus selected from the group consisting of: an Serial Peripheral Interface (SPI) interface, a Power Management Bus (PMBus) interface, and an Inter-Integrated Circuit (I 2 C) interface.

15. The apparatus of claim 10 , wherein the plurality of regulator phases includes two redundant phases in addition to a minimum number of phases required to supply a specified current to a host system.

16. The apparatus of claim 10 , wherein outputs of the linear regulators of the plurality of linear regulators are electrically connected to a common linear regulator output.

17. The apparatus of claim 10 , wherein the plurality of linear regulators are configured to maintain current sharing.

18. A method for generating, with an apparatus that includes a plurality of linear regulators, a secondary output voltage, the apparatus including:
a plurality of regulator phases each connected between a common regulator input and a common regulator output, each including a regulator configured to receive, at a regulator input, an input voltage and provide an output voltage; and
a plurality of linear regulators, each having:
a linear ORing device connected between the regulator output of a respective regulator and an output of the linear regulator;
an amplifier configured to control the linear ORing device to drive, on the output of the linear regulator, a voltage equivalent to a voltage on a reference voltage input;

the method comprising:
generating with the amplifier, a control voltage corresponding to a difference between a received sense voltage and a received reference voltage; and
driving, with the linear ORing device, in response to the control voltage received at the input of the linear ORing device, a voltage on the output of the linear regulator equivalent to the reference voltage.

19. The method of claim 18 , wherein the sense voltage that is received with the amplifier originates at a location on a printed circuit board (PCB) that is adjacent to a component mounted on the PCB.

Assignees

• IBM

Inventors

• Egan Patrick
• Miller Michael Lee

Classifications

• H02M3/1584 Primary

  with a plurality of power processing stages connected in parallel · CPC title

• H02M1/0009

  Devices or circuits for detecting current in a converter · CPC title

• H02M1/0045

  Converters combining the concepts of switch-mode regulation and linear regulation, e.g. linear pre-regulator to switching converter, linear and switching converter in parallel, same converter or same transistor operating either in linear or switching mode · CPC title

• H03K19/20

  characterised by logic function, e.g. AND, OR, NOR, NOT circuits (H03K19/003 - H03K19/01 take precedence) · CPC title

• H02M1/32

  Means for protecting converters other than automatic disconnection · CPC title