Devices and methods for selective display frame fetch

US10951792B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10951792-B2
Application numberUS-201916726637-A
CountryUS
Kind codeB2
Filing dateDec 24, 2019
Priority dateApr 2, 2018
Publication dateMar 16, 2021
Grant dateMar 16, 2021

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Techniques for selective display frame fetching can include receiving or fetching rendered display frames by a display engine. The display engine can determine if a new frame includes one or more dirty portions. If the new frame includes one or more dirty portions, just the dirty portions can be loaded by the display engine into a display buffer. The display engine can also scan out just the dirty portions from the display buffer to a display.

First claim

Opening claim text (preview).

What is claimed is: 1. A processing unit comprising: a display buffer; and a display engine to: receive an indication of a new frame; determine if the indication of a new frame includes an indication of a flip event; identify one or more dirty regions of the new frame based on the flip event; fill the display buffer with the one or more dirty regions of the new frame; scan out the one or more dirty regions of the new frame from the display buffer to a display port; and apply an adaptive contrast and backlight enhancement based on a histogram of changes in the new frame. 2. The processing unit of claim 1 , wherein the display engine is to disable the adaptive contrast and backlight enhancement when a flip completion event indication is determined and a timeout period has not expired. 3. The processing unit of claim 1 , wherein the display engine is to disable the adaptive contrast and backlight enhancement if a gamma curve is in a linear mode when a flip completion event indication is determined. 4. The processing unit of claim 3 , wherein the adaptive contrast and backlight enhancement is disabled if the gamma curve is in the linear mode before a timeout period has expired. 5. The processing unit of claim 3 , wherein the adaptive contrast and backlight enhancement is disabled if the gamma curve is in the linear mode prior to a predetermined number of frames. 6. The processing unit of any one of claim 1 , wherein the display engine is further to: fill the display buffer with the new frame when a flip completion event indication is not determined; and scan out the new frame from the display buffer to display port. 7. The processing unit of claim 6 , wherein the display engine is to: fill the display buffer with the new frame when the indication of the new frame is received after a timeout period has expired. 8. The processing unit of claim 6 , wherein the display engine is to: fill the display buffer with the new frame when the indication of the new frame is received after a predetermined number of frames. 9. A computing device comprising: a display; a display buffer; and a display engine to: receive an indication of a new frame; identify one or more dirty regions of the new frame; fill the display buffer with the one or more dirty regions of the new frame; scan out the one or more dirty regions of the new frame from the display buffer to a display port; and apply an adaptive contrast and backlight enhancement based on a histogram of changes in the new frame. 10. The computing device of claim 9 , wherein the display engine is to receive an indication of the one or more dirty regions. 11. The computing device of claim 9 , wherein the display engine is to: produce a flip of multiple planes; and determine which of the multiple planes includes one or more dirty regions based on which plane has flipped or not flipped. 12. The computing device of claim 9 , wherein the new frame, the one or more dirty regions of the new frame in the display buffer, and the one or more dirty regions of the new frame scanned out are compressed. 13. The computing device of claim 9 , wherein the display engine is to receive an indication of a new frame from at least one of a rendering engine or an operating system. 14. The computing device of claim 9 , wherein the display engine is to disable the adaptive contrast and backlight enhancement when a flip completion event indication is determined and a timeout period has not expired. 15. The computing device of claim 9 , wherein the display engine is to disable the adaptive contrast and backlight enhancement if a gamma curve is in a linear mode when a flip completion event indication is determined. 16. The computing device of claim 15 , wherein the adaptive contrast and backlight enhancement is disabled if the gamma curve is in the linear mode when a timeout period has not expired. 17. The computing device of claim 15 , wherein the adaptive contrast and backlight enhancement is disabled if the gamma curve is in the linear mode prior to a predetermined number of frames. 18. The computing device of claim 9 , wherein the display engine is to: fill the display buffer with the new frame when no dirty regions have been identified; and scan out the new frame from the display buffer to display port. 19. The computing device of claim 18 , wherein the display engine is further to: fill the display buffer with the new frame further when the indication of the new frame is received after a timeout period has expired. 20. The computing device of claim 18 , wherein the display engine is further to: fill the display buffer with the new frame further when the indication of the new frame is received after a predetermined number of frames. 21. A method of buffering rendered display frames for presenting on a display, the method comprising: receiving, at a display engine, an indication of a new frame; determining, with the display engine, if the indication of a new frame includes an indication of a flip event; determining, with the display engine, one or more dirty regions of the new frame based on the flip event; filling a display buffer with the one or more dirty regions of the new frame; and scanning out the one or more dirty regions of the new frame from the display buffer to a display port; and applying an adaptive contrast and backlight enhancement based on a histogram of changes in the new frame. 22. The method of claim 21 , further including: disabling the adaptive contrast and backlight enhancement when a flip completion event indication is determined and a timeout period has not expired. 23. The method of claim 21 , further including: disabling the adaptive contrast and backlight enhancement if a gamma curve is in a linear mode when a flip completion event indication is determined. 24. The method of claim 23 , wherein the adaptive contrast and backlight enhancement is further disabled if the gamma curve is in the linear mode before a timeout period has expired, or within a predetermined number of frames. 25. The method of claim 21 , further including: filling the display buffer with the new frame when a flip completion event indication is not determined; and scanning out the new frame from the display buffer to display port. 26. The method according to claim 25 , further including: filling the display buffer with the new frame when the indication of the new frame is received after a timeout period has expired. 27. The method according to claim 25 , further including: filling the display buffer with the new frame when the indication of the new frame is received after a predetermined number of frames.

Assignees

Inventors

Classifications

  • H04N5/76Primary

    Television signal recording · CPC title

  • for control of gamma adjustment, e.g. selecting another gamma curve · CPC title

  • Arrangements specially adapted for transferring the contents of two or more bit-mapped memories to the screen simultaneously, e.g. for mixing or overlay (G09G5/02 takes precedence) · CPC title

  • Switching ON and OFF the backlight within one frame · CPC title

  • Memory management · CPC title

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What does patent US10951792B2 cover?
Techniques for selective display frame fetching can include receiving or fetching rendered display frames by a display engine. The display engine can determine if a new frame includes one or more dirty portions. If the new frame includes one or more dirty portions, just the dirty portions can be loaded by the display engine into a display buffer. The display engine can also scan out just the di…
Who is the assignee on this patent?
Intel Corp
What technology area does this patent fall under?
Primary CPC classification H04N5/76. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Mar 16 2021 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).