Solar cells having differentiated P-type and N-type architectures

Patent metadata

Field	Value
Publication number	US-10950740-B2
Application number	US-201816199783-A
Country	US
Kind code	B2
Filing date	Nov 26, 2018
Priority date	Dec 19, 2016
Publication date	Mar 16, 2021
Grant date	Mar 16, 2021

Abstract

Methods of fabricating solar cell emitter regions with differentiated P-type and N-type region architectures, and the resulting solar cells, are described herein. In an example, a solar cell includes an N-type semiconductor substrate having a light-receiving surface and a back surface. A plurality of N-type polycrystalline silicon regions is disposed on a first thin dielectric layer disposed on the back surface of the N-type semiconductor substrate. A plurality of P-type polycrystalline silicon regions is disposed on a second thin dielectric layer disposed in a corresponding one of a plurality of trenches interleaving the plurality of N-type polycrystalline silicon regions in the back surface of the N-type semiconductor substrate.

First claim

What is claimed is:

1. A solar cell, comprising:
an N-type substrate having a light-receiving surface and a back surface;
a first dielectric layer disposed on the back surface of the substrate;
an N-type polycrystalline silicon emitter region disposed on the first dielectric layer;
a P-type polycrystalline silicon emitter region disposed on a second dielectric layer, wherein a total area of the N-type polycrystalline silicon emitter region is greater than a total area of the P-type polycrystalline silicon emitter region by a ratio of 15:1 or more;
a third dielectric layer disposed laterally directly between the N-type and P-type polycrystalline silicon emitter regions;
a first conductive contact structure disposed on the N-type polycrystalline silicon emitter region; and
a second conductive contact structure disposed on the P-type polycrystalline silicon emitter region, wherein the P-type polycrystalline silicon emitter region overlaps the N-type polycrystalline silicon emitter region.

2. The solar cell of claim 1 , wherein the N-type polycrystalline silicon emitter region has a width greater than a width of each of the P-type polycrystalline silicon emitter region by a ratio of 5:1 or more.

3. The solar cell of claim 1 , wherein the N-type polycrystalline silicon emitter region has a thickness relative to a thickness of the P-type polycrystalline silicon emitter region by a ratio of 3:1 or less.

4. A solar cell, comprising:
an N-type substrate having a light-receiving surface and a back surface;
a first dielectric layer disposed on the back surface of the substrate;
an N-type polycrystalline silicon emitter region of a first conductivity type disposed on the first dielectric layer;
a second dielectric layer disposed on the back surface of the substrate;
a P-type polycrystalline silicon emitter region disposed on the second dielectric layer, wherein a total area of the N-type polycrystalline silicon emitter region is greater than a total area of the P-type polycrystalline silicon emitter region by a ratio of 15:1 or more;
a third dielectric layer disposed directly between the N-type polycrystalline silicon emitter region and the P-type polycrystalline silicon emitter region;
an insulator layer disposed on the N-type polycrystalline silicon emitter region, wherein at least a portion of the P-type polycrystalline silicon emitter region is disposed on the insulator layer;
a first conductive contact structure disposed on the N-type polycrystalline silicon emitter region; and
a second conductive contact structure disposed on the P-type polycrystalline silicon emitter region, wherein the P-type polycrystalline silicon emitter region overlaps the N-type polycrystalline silicon emitter region.

5. The solar cell of claim 4 , wherein the N-type polycrystalline silicon emitter region has a width greater than a width of the P-type polycrystalline silicon emitter region by a ratio of 5:1 or more.

6. The solar cell of claim 4 , wherein the plurality of N-type polycrystalline silicon emitter region has a thickness relative to a thickness of the P-type polycrystalline silicon emitter region by a ratio of 3:1 or less.

7. A solar cell, comprising:
an N-type substrate having a light-receiving surface and a back surface;
a first dielectric layer disposed on the back surface of the substrate;
an N-type polycrystalline silicon emitter region disposed on the first dielectric layer;
a P-type polycrystalline silicon emitter region disposed on a second dielectric layer, wherein a total area of the N-type polycrystalline silicon emitter region is greater than a total area of the P-type polycrystalline silicon emitter region, and wherein the N-type polycrystalline silicon emitter region has a width greater than a width of each of the P-type polycrystalline silicon emitter region by a ratio of 5:1 or more;
a third dielectric layer disposed laterally directly between the N-type and P-type polycrystalline silicon emitter regions;
a first conductive contact structure disposed on the N-type polycrystalline silicon emitter region; and
a second conductive contact structure disposed on the P-type polycrystalline silicon emitter region, wherein the P-type polycrystalline silicon emitter region overlaps the N-type polycrystalline silicon emitter region.

8. The solar cell of claim 7 , wherein the N-type polycrystalline silicon emitter region has a thickness relative to a thickness of the P-type polycrystalline silicon emitter region by a ratio of 3:1 or less.

9. The solar cell of claim 7 , wherein the first dielectric layer comprises silicon and oxygen.

10. The solar cell of claim 7 , wherein the second dielectric layer comprises silicon and oxygen.

11. A solar cell, comprising:
an N-type substrate having a light-receiving surface and a back surface;
a first dielectric layer disposed on the back surface of the substrate;
an N-type polycrystalline silicon emitter region of a first conductivity type disposed on the first dielectric layer;
a second dielectric layer disposed on the back surface of the substrate;
a P-type polycrystalline silicon emitter region disposed on the second dielectric layer, wherein a total area of the N-type polycrystalline silicon emitter region is greater than a total area of the P-type polycrystalline silicon emitter region, and wherein the N-type polycrystalline silicon emitter region has a width greater than a width of the P-type polycrystalline silicon emitter region by a ratio of 5:1 or more;
a third dielectric layer disposed directly between the N-type polycrystalline silicon emitter region and the P-type polycrystalline silicon emitter region;
an insulator layer disposed on the N-type polycrystalline silicon emitter region, wherein at least a portion of the P-type polycrystalline silicon emitter region is disposed on the insulator layer;
a first conductive contact structure disposed on the N-type polycrystalline silicon emitter region; and
a second conductive contact structure disposed on the P-type polycrystalline silicon emitter region, wherein the P-type polycrystalline silicon emitter region overlaps the N-type polycrystalline silicon emitter region.

12. The solar cell of claim 11 , wherein the plurality of N-type polycrystalline silicon emitter region has a thickness relative to a thickness of the P-type polycrystalline silicon emitter region by a ratio of 3:1 or less.

13. The solar cell of claim 11 , wherein the first dielectric layer comprises silicon and oxygen.

14. The solar cell of claim 11 , wherein the second dielectric layer comprises silicon and oxygen.

15. The solar cell of claim 1 , wherein the N-type polycrystalline silicon emitter region has a width greater than a width of each of the P-type polycrystalline silicon emitter region by a ratio of 5:1 or more, and wherein the N-type polycrystalline silicon emitter region has a thickness relative to a thickness of the P-type polycrystalline silicon emitter region by a ratio of 3:1 or less.

16. The solar cell of claim 1 , wherein the first dielectric layer comprises silicon and oxygen.

17. The solar cell of claim 1 , wherein the second dielectric layer comprises silicon and oxygen.

18. The solar cell of claim 4 , wherein the N-type polycrystalline silicon emitter region has a width greater than a width of the P-type polycrystalline silicon emitter region by a ratio of 5:1 or more, and wherein the plurality of N-type polycrystalline silicon emitter region has a thickness relative to a thickness of the P-type polycrystalline silicon emitter region by a ratio of 3:1 or

Assignees

• Sunpower Corp

Inventors

• Smith David D
• Waldhauer Ann
• Balu Venkatasubramani
• Tracy Kieran Mark

Classifications

• H10F77/1642

  including only Group IV materials · CPC title

• H10F77/227

  for emitter wrap-through [EWT] photovoltaic cells, e.g. interdigitated emitter-base back-contacts · CPC title

• H10F71/121

  The active layers comprising only Group IV materials · CPC title

• H10F10/146

  Back-junction photovoltaic cells, e.g. having interdigitated base-emitter regions on the back side · CPC title

• H10F10/14

  Photovoltaic cells having only PN homojunction potential barriers · CPC title